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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id 185sm2674363wmc.32.2020.04.23.00.34.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2020 00:34:18 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v2 3/5] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[] Date: Thu, 23 Apr 2020 09:33:56 +0200 Message-Id: <20200423073358.27155-4-philmd@redhat.com> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200423073358.27155-1-philmd@redhat.com> References: <20200423073358.27155-1-philmd@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8; text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=205.139.110.61; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/04/23 03:23:21 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] X-Received-From: 205.139.110.61 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/cpu.c | 8 +++----- target/arm/cpu64.c | 8 +++----- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 47e35400da..30e961f775 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2745,7 +2745,6 @@ static const ARMCPUInfo arm_cpus[] =3D { { .name =3D "any", .initfn =3D arm_max_initfn }, #endif #endif - { .name =3D NULL } }; =20 static Property arm_cpu_properties[] =3D { @@ -2893,14 +2892,13 @@ static const TypeInfo idau_interface_type_info =3D = { =20 static void arm_cpu_register_types(void) { - const ARMCPUInfo *info =3D arm_cpus; + size_t i; =20 type_register_static(&arm_cpu_type_info); type_register_static(&idau_interface_type_info); =20 - while (info->name) { - arm_cpu_register(info); - info++; + for (i =3D 0; i < ARRAY_SIZE(arm_cpus); ++i) { + arm_cpu_register(&arm_cpus[i]); } =20 #ifdef CONFIG_KVM diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 951588c56e..ef9231d55b 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -742,7 +742,6 @@ static const ARMCPUInfo aarch64_cpus[] =3D { { .name =3D "cortex-a53", .initfn =3D aarch64_a53_initfn }, { .name =3D "cortex-a72", .initfn =3D aarch64_a72_initfn }, { .name =3D "max", .initfn =3D aarch64_max_initfn }, - { .name =3D NULL } }; =20 static bool aarch64_cpu_get_aarch64(Object *obj, Error **errp) @@ -848,13 +847,12 @@ static const TypeInfo aarch64_cpu_type_info =3D { =20 static void aarch64_cpu_register_types(void) { - const ARMCPUInfo *info =3D aarch64_cpus; + size_t i; =20 type_register_static(&aarch64_cpu_type_info); =20 - while (info->name) { - aarch64_cpu_register(info); - info++; + for (i =3D 0; i < ARRAY_SIZE(aarch64_cpus); ++i) { + aarch64_cpu_register(&aarch64_cpus[i]); } } =20 --=20 2.21.1