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[109.66.7.121]) by smtp.gmail.com with ESMTPSA id t16sm7000024wmi.27.2020.04.29.03.15.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2020 03:15:44 -0700 (PDT) Date: Wed, 29 Apr 2020 06:15:41 -0400 From: "Michael S. Tsirkin" To: Ani Sinha Subject: Re: [PATCH V2] Add a new PIIX option to control PCI hot unplugging of devices on non-root buses Message-ID: <20200429060230-mutt-send-email-mst@kernel.org> References: <20200429025200-mutt-send-email-mst@kernel.org> <20200429025535-mutt-send-email-mst@kernel.org> <20200429033657-mutt-send-email-mst@kernel.org> <20200429035457-mutt-send-email-mst@kernel.org> <2F2DCEBC-C0B5-4653-B741-245A9FF38BDE@nutanix.com> <20200429045427-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Received-SPF: pass client-ip=207.211.31.120; envelope-from=mst@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/04/29 01:18:10 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "qemu-devel@nongnu.org" , Aleksandar Markovic , Paolo Bonzini , Ani Sinha , Igor Mammedov , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, Apr 29, 2020 at 09:14:26AM +0000, Ani Sinha wrote: >=20 >=20 > > On Apr 29, 2020, at 2:26 PM, Michael S. Tsirkin wrote: > >=20 > > Even if it seems to work for guests now, if we don't stick to emulating > > capabilities that hardware interfaces provide we can never be sure it > > will keep working. >=20 > OS es use ACPI for PCI bridges: https://github.com/qemu/qemu/blob/master/= docs/pcie.txt > They use =E2=80=9C_EJ0=E2=80=9D to detect jot unplug capability: https://= uefi.org/sites/default/files/resources/ACPI_3.pdf >=20 > 6.3.3 _EJx (Eject) These control methods are optional and are supplied fo= r devices that support a software-controlled VCRstyle ejection mechanism or= that require an action be performed such as isolation of power/data lines = before the device can be removed from the system. To support warm (system i= s in a sleep state) and hot (system is in S0) removal, an _EJx control meth= od is listed for each sleep state from which the device supports removal, w= here x is the sleeping state supported. For example, _EJ0 indicates the dev= ice supports hot removal; _EJ1=E2=80=93EJ4 indicate the device supports war= m removal. Yes. So if there's no _EJx then it's reasonable to assume you can't isolate the slot, and so no hot-plug will happen either. >=20 > Note that =E2=80=9Cthese control methods are optional=E2=80=9D line. If t= he OS adheres to the spec, it should not expect them to exist all the time. >=20 --=20 MST