From: LIU Zhiwei <zhiwei_liu@c-sky.com>
To: peter.maydell@linaro.org
Cc: qemu-riscv@nongnu.org, richard.henderson@linaro.org,
qemu-devel@nongnu.org, wxy194768@alibaba-inc.com,
wenmeng_zhang@c-sky.com, palmer@dabbelt.com,
alistair23@gmail.com, alex.bennee@linaro.org,
LIU Zhiwei <zhiwei_liu@c-sky.com>
Subject: [RFC PATCH 6/8] riscv: Add configure script
Date: Thu, 30 Apr 2020 15:21:37 +0800 [thread overview]
Message-ID: <20200430072139.4602-7-zhiwei_liu@c-sky.com> (raw)
In-Reply-To: <20200430072139.4602-1-zhiwei_liu@c-sky.com>
For RV64 risu, make CFLAGS="-march=rv64g"
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
---
configure | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index ca2d7db..5c9e967 100755
--- a/configure
+++ b/configure
@@ -58,6 +58,8 @@ guess_arch() {
ARCH="m68k"
elif check_define __powerpc64__ ; then
ARCH="ppc64"
+ elif check_define __riscv ; then
+ ARCH="riscv64"
else
echo "This cpu is not supported by risu. Try -h. " >&2
exit 1
@@ -139,7 +141,7 @@ Some influential environment variables:
prefixed with the given string.
ARCH force target architecture instead of trying to detect it.
- Valid values=[arm|aarch64|ppc64|ppc64le|m68k]
+ Valid values=[arm|aarch64|ppc64|ppc64le|m68k|riscv64]
CC C compiler command
CFLAGS C compiler flags
--
2.23.0
next prev parent reply other threads:[~2020-04-30 7:26 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 7:21 [RFC PATCH 0/8] RISCV risu porting LIU Zhiwei
2020-04-30 7:21 ` [RFC PATCH 1/8] riscv: Add RV64I instructions description LIU Zhiwei
2020-05-11 16:39 ` Richard Henderson
2020-05-20 2:41 ` LIU Zhiwei
2020-05-20 5:39 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 2/8] riscv: Generate payload scripts LIU Zhiwei
2020-05-11 17:40 ` Richard Henderson
2020-05-20 2:37 ` LIU Zhiwei
2020-05-20 5:41 ` Richard Henderson
2020-05-20 9:06 ` LIU Zhiwei
2020-04-30 7:21 ` [RFC PATCH 3/8] riscv: Define riscv struct reginfo LIU Zhiwei
2020-05-11 17:42 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 4/8] riscv: Implement payload load interfaces LIU Zhiwei
2020-05-11 18:03 ` Richard Henderson
2020-05-11 18:07 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 5/8] riscv: Add standard test case LIU Zhiwei
2020-05-11 18:04 ` Richard Henderson
2020-04-30 7:21 ` LIU Zhiwei [this message]
2020-05-11 18:06 ` [RFC PATCH 6/8] riscv: Add configure script Richard Henderson
2020-05-20 1:45 ` LIU Zhiwei
2020-05-20 2:28 ` LIU Zhiwei
2020-04-30 7:21 ` [RFC PATCH 7/8] riscv: Add RV64M instructions description LIU Zhiwei
2020-05-11 18:12 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 8/8] riscv: Add RV64F " LIU Zhiwei
2020-05-11 18:11 ` Richard Henderson
2020-05-19 12:27 ` LIU Zhiwei
2020-05-11 16:30 ` [RFC PATCH 0/8] RISCV risu porting Richard Henderson
2020-05-19 9:44 ` LIU Zhiwei
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