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[88.21.207.26]) by smtp.gmail.com with ESMTPSA id t4sm13373338wri.54.2020.05.04.08.29.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 08:29:57 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v3 07/12] target/riscv/cpu: Restrict CPU migration to system-mode Date: Mon, 4 May 2020 17:29:17 +0200 Message-Id: <20200504152922.21365-8-philmd@redhat.com> X-Mailer: git-send-email 2.21.3 In-Reply-To: <20200504152922.21365-1-philmd@redhat.com> References: <20200504152922.21365-1-philmd@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8; text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=207.211.31.120; envelope-from=philmd@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/04 05:09:11 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , qemu-riscv@nongnu.org, Eduardo Habkost , Sagar Karandikar , David Hildenbrand , Bastian Koppelmann , Cornelia Huck , Richard Henderson , qemu-s390x@nongnu.org, Palmer Dabbelt , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/riscv/cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 059d71f2c7..6c78337858 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -485,10 +485,12 @@ static void riscv_cpu_init(Object *obj) cpu_set_cpustate_pointers(cpu); } =20 +#ifndef CONFIG_USER_ONLY static const VMStateDescription vmstate_riscv_cpu =3D { .name =3D "cpu", .unmigratable =3D 1, }; +#endif =20 static Property riscv_cpu_properties[] =3D { DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true), @@ -544,13 +546,13 @@ static void riscv_cpu_class_init(ObjectClass *c, void= *data) cc->do_transaction_failed =3D riscv_cpu_do_transaction_failed; cc->do_unaligned_access =3D riscv_cpu_do_unaligned_access; cc->get_phys_page_debug =3D riscv_cpu_get_phys_page_debug; + /* For now, mark unmigratable: */ + cc->vmsd =3D &vmstate_riscv_cpu; #endif #ifdef CONFIG_TCG cc->tcg_initialize =3D riscv_translate_init; cc->tlb_fill =3D riscv_cpu_tlb_fill; #endif - /* For now, mark unmigratable: */ - cc->vmsd =3D &vmstate_riscv_cpu; device_class_set_props(dc, riscv_cpu_properties); } =20 --=20 2.21.3