From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH v3 1/5] target/arm/kvm: Inline set_feature() calls
Date: Mon, 4 May 2020 19:24:44 +0200 [thread overview]
Message-ID: <20200504172448.9402-2-philmd@redhat.com> (raw)
In-Reply-To: <20200504172448.9402-1-philmd@redhat.com>
We want to move the inlined declarations of set_feature()
from cpu*.c to cpu.h. To avoid clashing with the KVM
declarations, inline the few KVM calls.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
target/arm/kvm32.c | 13 ++++---------
target/arm/kvm64.c | 22 ++++++----------------
2 files changed, 10 insertions(+), 25 deletions(-)
diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c
index f271181ab8..7b3a19e9ae 100644
--- a/target/arm/kvm32.c
+++ b/target/arm/kvm32.c
@@ -22,11 +22,6 @@
#include "internals.h"
#include "qemu/log.h"
-static inline void set_feature(uint64_t *features, int feature)
-{
- *features |= 1ULL << feature;
-}
-
static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id)
{
struct kvm_one_reg idreg = { .id = id, .addr = (uintptr_t)pret };
@@ -146,14 +141,14 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
* timers; this in turn implies most of the other feature
* bits, but a few must be tested.
*/
- set_feature(&features, ARM_FEATURE_V7VE);
- set_feature(&features, ARM_FEATURE_GENERIC_TIMER);
+ features |= 1ULL << ARM_FEATURE_V7VE;
+ features |= 1ULL << ARM_FEATURE_GENERIC_TIMER;
if (extract32(id_pfr0, 12, 4) == 1) {
- set_feature(&features, ARM_FEATURE_THUMB2EE);
+ features |= 1ULL << ARM_FEATURE_THUMB2EE;
}
if (extract32(ahcf->isar.mvfr1, 12, 4) == 1) {
- set_feature(&features, ARM_FEATURE_NEON);
+ features |= 1ULL << ARM_FEATURE_NEON;
}
ahcf->features = features;
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index be5b31c2b0..cd8ab6b8ae 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -447,16 +447,6 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq)
}
}
-static inline void set_feature(uint64_t *features, int feature)
-{
- *features |= 1ULL << feature;
-}
-
-static inline void unset_feature(uint64_t *features, int feature)
-{
- *features &= ~(1ULL << feature);
-}
-
static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id)
{
uint64_t ret;
@@ -648,11 +638,11 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
* with VFPv4+Neon; this in turn implies most of the other
* feature bits.
*/
- set_feature(&features, ARM_FEATURE_V8);
- set_feature(&features, ARM_FEATURE_NEON);
- set_feature(&features, ARM_FEATURE_AARCH64);
- set_feature(&features, ARM_FEATURE_PMU);
- set_feature(&features, ARM_FEATURE_GENERIC_TIMER);
+ features |= 1ULL << ARM_FEATURE_V8;
+ features |= 1ULL << ARM_FEATURE_NEON;
+ features |= 1ULL << ARM_FEATURE_AARCH64;
+ features |= 1ULL << ARM_FEATURE_PMU;
+ features |= 1ULL << ARM_FEATURE_GENERIC_TIMER;
ahcf->features = features;
@@ -802,7 +792,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->has_pmu) {
cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PMU_V3;
} else {
- unset_feature(&env->features, ARM_FEATURE_PMU);
+ env->features &= ~(1ULL << ARM_FEATURE_PMU);
}
if (cpu_isar_feature(aa64_sve, cpu)) {
assert(kvm_arm_sve_supported(cs));
--
2.21.3
next prev parent reply other threads:[~2020-05-04 17:27 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-04 17:24 [PATCH v3 0/5] target/arm: Restrict TCG cpus to TCG accel Philippe Mathieu-Daudé
2020-05-04 17:24 ` Philippe Mathieu-Daudé [this message]
2020-05-04 17:24 ` [PATCH v3 2/5] target/arm: Make set_feature() available for other files Philippe Mathieu-Daudé
2020-05-04 17:24 ` [PATCH v3 3/5] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[] Philippe Mathieu-Daudé
2020-05-04 18:08 ` Richard Henderson
2020-05-04 17:24 ` [PATCH v3 4/5] target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUs Philippe Mathieu-Daudé
2020-05-04 18:28 ` Richard Henderson
2020-05-04 17:24 ` [PATCH v3 5/5] target/arm: Restrict TCG cpus to TCG accel Philippe Mathieu-Daudé
2020-05-11 10:48 ` [PATCH v3 0/5] " Peter Maydell
2020-05-11 12:19 ` Philippe Mathieu-Daudé
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