* [PATCH v4 01/19] tcg: Consolidate 3 bits into enum TCGTempKind
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
@ 2020-05-08 18:25 ` Richard Henderson
2020-05-08 18:59 ` Philippe Mathieu-Daudé
2020-05-08 18:25 ` [PATCH v4 02/19] tcg: Add temp_readonly Richard Henderson
` (17 subsequent siblings)
18 siblings, 1 reply; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:25 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
The temp_fixed, temp_global, temp_local bits are all related.
Combine them into a single enumeration.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 20 +++++---
tcg/optimize.c | 8 +--
tcg/tcg.c | 122 ++++++++++++++++++++++++++++------------------
3 files changed, 90 insertions(+), 60 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 380014ed80..06486635e6 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -483,23 +483,27 @@ typedef enum TCGTempVal {
TEMP_VAL_CONST,
} TCGTempVal;
+typedef enum TCGTempKind {
+ /* Temp is dead at the end of all basic blocks. */
+ TEMP_NORMAL,
+ /* Temp is saved across basic blocks but dead at the end of TBs. */
+ TEMP_LOCAL,
+ /* Temp is saved across both basic blocks and translation blocks. */
+ TEMP_GLOBAL,
+ /* Temp is in a fixed register. */
+ TEMP_FIXED,
+} TCGTempKind;
+
typedef struct TCGTemp {
TCGReg reg:8;
TCGTempVal val_type:8;
TCGType base_type:8;
TCGType type:8;
- unsigned int fixed_reg:1;
+ TCGTempKind kind:3;
unsigned int indirect_reg:1;
unsigned int indirect_base:1;
unsigned int mem_coherent:1;
unsigned int mem_allocated:1;
- /* If true, the temp is saved across both basic blocks and
- translation blocks. */
- unsigned int temp_global:1;
- /* If true, the temp is saved across basic blocks but dead
- at the end of translation blocks. If false, the temp is
- dead at the end of basic blocks. */
- unsigned int temp_local:1;
unsigned int temp_allocated:1;
tcg_target_long val;
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 53aa8e5329..afb4a9a5a9 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -116,21 +116,21 @@ static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
TCGTemp *i;
/* If this is already a global, we can't do better. */
- if (ts->temp_global) {
+ if (ts->kind >= TEMP_GLOBAL) {
return ts;
}
/* Search for a global first. */
for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
- if (i->temp_global) {
+ if (i->kind >= TEMP_GLOBAL) {
return i;
}
}
/* If it is a temp, search for a temp local. */
- if (!ts->temp_local) {
+ if (ts->kind == TEMP_NORMAL) {
for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
- if (ts->temp_local) {
+ if (i->kind >= TEMP_LOCAL) {
return i;
}
}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 216a6963b3..2c022c9621 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1155,7 +1155,7 @@ static inline TCGTemp *tcg_global_alloc(TCGContext *s)
tcg_debug_assert(s->nb_globals == s->nb_temps);
s->nb_globals++;
ts = tcg_temp_alloc(s);
- ts->temp_global = 1;
+ ts->kind = TEMP_GLOBAL;
return ts;
}
@@ -1172,7 +1172,7 @@ static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type,
ts = tcg_global_alloc(s);
ts->base_type = type;
ts->type = type;
- ts->fixed_reg = 1;
+ ts->kind = TEMP_FIXED;
ts->reg = reg;
ts->name = name;
tcg_regset_set_reg(s->reserved_regs, reg);
@@ -1199,7 +1199,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
bigendian = 1;
#endif
- if (!base_ts->fixed_reg) {
+ if (base_ts->kind != TEMP_FIXED) {
/* We do not support double-indirect registers. */
tcg_debug_assert(!base_ts->indirect_reg);
base_ts->indirect_base = 1;
@@ -1247,6 +1247,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_local)
{
TCGContext *s = tcg_ctx;
+ TCGTempKind kind = temp_local ? TEMP_LOCAL : TEMP_NORMAL;
TCGTemp *ts;
int idx, k;
@@ -1259,7 +1260,7 @@ TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_local)
ts = &s->temps[idx];
ts->temp_allocated = 1;
tcg_debug_assert(ts->base_type == type);
- tcg_debug_assert(ts->temp_local == temp_local);
+ tcg_debug_assert(ts->kind == kind);
} else {
ts = tcg_temp_alloc(s);
if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
@@ -1268,18 +1269,18 @@ TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_local)
ts->base_type = type;
ts->type = TCG_TYPE_I32;
ts->temp_allocated = 1;
- ts->temp_local = temp_local;
+ ts->kind = kind;
tcg_debug_assert(ts2 == ts + 1);
ts2->base_type = TCG_TYPE_I64;
ts2->type = TCG_TYPE_I32;
ts2->temp_allocated = 1;
- ts2->temp_local = temp_local;
+ ts2->kind = kind;
} else {
ts->base_type = type;
ts->type = type;
ts->temp_allocated = 1;
- ts->temp_local = temp_local;
+ ts->kind = kind;
}
}
@@ -1336,12 +1337,12 @@ void tcg_temp_free_internal(TCGTemp *ts)
}
#endif
- tcg_debug_assert(ts->temp_global == 0);
+ tcg_debug_assert(ts->kind < TEMP_GLOBAL);
tcg_debug_assert(ts->temp_allocated != 0);
ts->temp_allocated = 0;
idx = temp_idx(ts);
- k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0);
+ k = ts->base_type + (ts->kind == TEMP_NORMAL ? 0 : TCG_TYPE_COUNT);
set_bit(idx, s->free_temps[k].l);
}
@@ -1871,17 +1872,27 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args)
static void tcg_reg_alloc_start(TCGContext *s)
{
int i, n;
- TCGTemp *ts;
- for (i = 0, n = s->nb_globals; i < n; i++) {
- ts = &s->temps[i];
- ts->val_type = (ts->fixed_reg ? TEMP_VAL_REG : TEMP_VAL_MEM);
- }
- for (n = s->nb_temps; i < n; i++) {
- ts = &s->temps[i];
- ts->val_type = (ts->temp_local ? TEMP_VAL_MEM : TEMP_VAL_DEAD);
- ts->mem_allocated = 0;
- ts->fixed_reg = 0;
+ for (i = 0, n = s->nb_temps; i < n; i++) {
+ TCGTemp *ts = &s->temps[i];
+ TCGTempVal val = TEMP_VAL_MEM;
+
+ switch (ts->kind) {
+ case TEMP_FIXED:
+ val = TEMP_VAL_REG;
+ break;
+ case TEMP_GLOBAL:
+ break;
+ case TEMP_NORMAL:
+ val = TEMP_VAL_DEAD;
+ /* fall through */
+ case TEMP_LOCAL:
+ ts->mem_allocated = 0;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ ts->val_type = val;
}
memset(s->reg_to_temp, 0, sizeof(s->reg_to_temp));
@@ -1892,12 +1903,17 @@ static char *tcg_get_arg_str_ptr(TCGContext *s, char *buf, int buf_size,
{
int idx = temp_idx(ts);
- if (ts->temp_global) {
+ switch (ts->kind) {
+ case TEMP_FIXED:
+ case TEMP_GLOBAL:
pstrcpy(buf, buf_size, ts->name);
- } else if (ts->temp_local) {
+ break;
+ case TEMP_LOCAL:
snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
- } else {
+ break;
+ case TEMP_NORMAL:
snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
+ break;
}
return buf;
}
@@ -2493,15 +2509,24 @@ static void la_bb_end(TCGContext *s, int ng, int nt)
{
int i;
- for (i = 0; i < ng; ++i) {
- s->temps[i].state = TS_DEAD | TS_MEM;
- la_reset_pref(&s->temps[i]);
- }
- for (i = ng; i < nt; ++i) {
- s->temps[i].state = (s->temps[i].temp_local
- ? TS_DEAD | TS_MEM
- : TS_DEAD);
- la_reset_pref(&s->temps[i]);
+ for (i = 0; i < nt; ++i) {
+ TCGTemp *ts = &s->temps[i];
+ int state;
+
+ switch (ts->kind) {
+ case TEMP_FIXED:
+ case TEMP_GLOBAL:
+ case TEMP_LOCAL:
+ state = TS_DEAD | TS_MEM;
+ break;
+ case TEMP_NORMAL:
+ state = TS_DEAD;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ ts->state = state;
+ la_reset_pref(ts);
}
}
@@ -3110,7 +3135,8 @@ static void check_regs(TCGContext *s)
}
for (k = 0; k < s->nb_temps; k++) {
ts = &s->temps[k];
- if (ts->val_type == TEMP_VAL_REG && !ts->fixed_reg
+ if (ts->val_type == TEMP_VAL_REG
+ && ts->kind != TEMP_FIXED
&& s->reg_to_temp[ts->reg] != ts) {
printf("Inconsistency for temp %s:\n",
tcg_get_arg_str_ptr(s, buf, sizeof(buf), ts));
@@ -3147,15 +3173,14 @@ static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRegSet);
mark it free; otherwise mark it dead. */
static void temp_free_or_dead(TCGContext *s, TCGTemp *ts, int free_or_dead)
{
- if (ts->fixed_reg) {
+ if (ts->kind == TEMP_FIXED) {
return;
}
if (ts->val_type == TEMP_VAL_REG) {
s->reg_to_temp[ts->reg] = NULL;
}
ts->val_type = (free_or_dead < 0
- || ts->temp_local
- || ts->temp_global
+ || ts->kind != TEMP_NORMAL
? TEMP_VAL_MEM : TEMP_VAL_DEAD);
}
@@ -3172,7 +3197,7 @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts)
static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
TCGRegSet preferred_regs, int free_or_dead)
{
- if (ts->fixed_reg) {
+ if (ts->kind == TEMP_FIXED) {
return;
}
if (!ts->mem_coherent) {
@@ -3330,7 +3355,8 @@ static void temp_save(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs)
{
/* The liveness analysis already ensures that globals are back
in memory. Keep an tcg_debug_assert for safety. */
- tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg);
+ tcg_debug_assert(ts->val_type == TEMP_VAL_MEM
+ || ts->kind == TEMP_FIXED);
}
/* save globals to their canonical location and assume they can be
@@ -3355,7 +3381,7 @@ static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
for (i = 0, n = s->nb_globals; i < n; i++) {
TCGTemp *ts = &s->temps[i];
tcg_debug_assert(ts->val_type != TEMP_VAL_REG
- || ts->fixed_reg
+ || ts->kind == TEMP_FIXED
|| ts->mem_coherent);
}
}
@@ -3368,7 +3394,7 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
for (i = s->nb_globals; i < s->nb_temps; i++) {
TCGTemp *ts = &s->temps[i];
- if (ts->temp_local) {
+ if (ts->kind == TEMP_LOCAL) {
temp_save(s, ts, allocated_regs);
} else {
/* The liveness analysis already ensures that temps are dead.
@@ -3388,7 +3414,7 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
TCGRegSet preferred_regs)
{
/* ENV should not be modified. */
- tcg_debug_assert(!ots->fixed_reg);
+ tcg_debug_assert(ots->kind != TEMP_FIXED);
/* The movi is not explicitly generated here. */
if (ots->val_type == TEMP_VAL_REG) {
@@ -3428,7 +3454,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
ts = arg_temp(op->args[1]);
/* ENV should not be modified. */
- tcg_debug_assert(!ots->fixed_reg);
+ tcg_debug_assert(ots->kind != TEMP_FIXED);
/* Note that otype != itype for no-op truncation. */
otype = ots->type;
@@ -3467,7 +3493,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
}
temp_dead(s, ots);
} else {
- if (IS_DEAD_ARG(1) && !ts->fixed_reg) {
+ if (IS_DEAD_ARG(1) && ts->kind != TEMP_FIXED) {
/* the mov can be suppressed */
if (ots->val_type == TEMP_VAL_REG) {
s->reg_to_temp[ots->reg] = NULL;
@@ -3489,7 +3515,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
* Store the source register into the destination slot
* and leave the destination temp as TEMP_VAL_MEM.
*/
- assert(!ots->fixed_reg);
+ assert(ots->kind != TEMP_FIXED);
if (!ts->mem_allocated) {
temp_allocate_frame(s, ots);
}
@@ -3526,7 +3552,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op)
its = arg_temp(op->args[1]);
/* ENV should not be modified. */
- tcg_debug_assert(!ots->fixed_reg);
+ tcg_debug_assert(ots->kind != TEMP_FIXED);
itype = its->type;
vece = TCGOP_VECE(op);
@@ -3666,7 +3692,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
i_preferred_regs = o_preferred_regs = 0;
if (arg_ct->ct & TCG_CT_IALIAS) {
o_preferred_regs = op->output_pref[arg_ct->alias_index];
- if (ts->fixed_reg) {
+ if (ts->kind == TEMP_FIXED) {
/* if fixed register, we must allocate a new register
if the alias is not the same register */
if (arg != op->args[arg_ct->alias_index]) {
@@ -3757,7 +3783,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
ts = arg_temp(arg);
/* ENV should not be modified. */
- tcg_debug_assert(!ts->fixed_reg);
+ tcg_debug_assert(ts->kind != TEMP_FIXED);
if ((arg_ct->ct & TCG_CT_ALIAS)
&& !const_args[arg_ct->alias_index]) {
@@ -3799,7 +3825,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
ts = arg_temp(op->args[i]);
/* ENV should not be modified. */
- tcg_debug_assert(!ts->fixed_reg);
+ tcg_debug_assert(ts->kind != TEMP_FIXED);
if (NEED_SYNC_ARG(i)) {
temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i));
@@ -3931,7 +3957,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
ts = arg_temp(arg);
/* ENV should not be modified. */
- tcg_debug_assert(!ts->fixed_reg);
+ tcg_debug_assert(ts->kind != TEMP_FIXED);
reg = tcg_target_call_oarg_regs[i];
tcg_debug_assert(s->reg_to_temp[reg] == NULL);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v4 01/19] tcg: Consolidate 3 bits into enum TCGTempKind
2020-05-08 18:25 ` [PATCH v4 01/19] tcg: Consolidate 3 bits into enum TCGTempKind Richard Henderson
@ 2020-05-08 18:59 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 22+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-08 18:59 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: alex.bennee
On 5/8/20 8:25 PM, Richard Henderson wrote:
> The temp_fixed, temp_global, temp_local bits are all related.
> Combine them into a single enumeration.
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/tcg/tcg.h | 20 +++++---
> tcg/optimize.c | 8 +--
> tcg/tcg.c | 122 ++++++++++++++++++++++++++++------------------
> 3 files changed, 90 insertions(+), 60 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v4 02/19] tcg: Add temp_readonly
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
2020-05-08 18:25 ` [PATCH v4 01/19] tcg: Consolidate 3 bits into enum TCGTempKind Richard Henderson
@ 2020-05-08 18:25 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 03/19] tcg: Introduce TYPE_CONST temporaries Richard Henderson
` (16 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:25 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, Philippe Mathieu-Daudé
In most, but not all, places that we check for TEMP_FIXED,
we are really testing that we do not modify the temporary.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 5 +++++
tcg/tcg.c | 21 ++++++++++-----------
2 files changed, 15 insertions(+), 11 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 06486635e6..0d09ea7822 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -681,6 +681,11 @@ struct TCGContext {
target_ulong gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS];
};
+static inline bool temp_readonly(TCGTemp *ts)
+{
+ return ts->kind == TEMP_FIXED;
+}
+
extern TCGContext tcg_init_ctx;
extern __thread TCGContext *tcg_ctx;
extern TCGv_env cpu_env;
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 2c022c9621..a529166026 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -3173,7 +3173,7 @@ static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRegSet);
mark it free; otherwise mark it dead. */
static void temp_free_or_dead(TCGContext *s, TCGTemp *ts, int free_or_dead)
{
- if (ts->kind == TEMP_FIXED) {
+ if (temp_readonly(ts)) {
return;
}
if (ts->val_type == TEMP_VAL_REG) {
@@ -3197,7 +3197,7 @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts)
static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
TCGRegSet preferred_regs, int free_or_dead)
{
- if (ts->kind == TEMP_FIXED) {
+ if (temp_readonly(ts)) {
return;
}
if (!ts->mem_coherent) {
@@ -3355,8 +3355,7 @@ static void temp_save(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs)
{
/* The liveness analysis already ensures that globals are back
in memory. Keep an tcg_debug_assert for safety. */
- tcg_debug_assert(ts->val_type == TEMP_VAL_MEM
- || ts->kind == TEMP_FIXED);
+ tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || temp_readonly(ts));
}
/* save globals to their canonical location and assume they can be
@@ -3414,7 +3413,7 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
TCGRegSet preferred_regs)
{
/* ENV should not be modified. */
- tcg_debug_assert(ots->kind != TEMP_FIXED);
+ tcg_debug_assert(!temp_readonly(ots));
/* The movi is not explicitly generated here. */
if (ots->val_type == TEMP_VAL_REG) {
@@ -3454,7 +3453,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
ts = arg_temp(op->args[1]);
/* ENV should not be modified. */
- tcg_debug_assert(ots->kind != TEMP_FIXED);
+ tcg_debug_assert(!temp_readonly(ots));
/* Note that otype != itype for no-op truncation. */
otype = ots->type;
@@ -3515,7 +3514,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
* Store the source register into the destination slot
* and leave the destination temp as TEMP_VAL_MEM.
*/
- assert(ots->kind != TEMP_FIXED);
+ assert(!temp_readonly(ots));
if (!ts->mem_allocated) {
temp_allocate_frame(s, ots);
}
@@ -3552,7 +3551,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op)
its = arg_temp(op->args[1]);
/* ENV should not be modified. */
- tcg_debug_assert(ots->kind != TEMP_FIXED);
+ tcg_debug_assert(!temp_readonly(ots));
itype = its->type;
vece = TCGOP_VECE(op);
@@ -3783,7 +3782,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
ts = arg_temp(arg);
/* ENV should not be modified. */
- tcg_debug_assert(ts->kind != TEMP_FIXED);
+ tcg_debug_assert(!temp_readonly(ts));
if ((arg_ct->ct & TCG_CT_ALIAS)
&& !const_args[arg_ct->alias_index]) {
@@ -3825,7 +3824,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
ts = arg_temp(op->args[i]);
/* ENV should not be modified. */
- tcg_debug_assert(ts->kind != TEMP_FIXED);
+ tcg_debug_assert(!temp_readonly(ts));
if (NEED_SYNC_ARG(i)) {
temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i));
@@ -3957,7 +3956,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
ts = arg_temp(arg);
/* ENV should not be modified. */
- tcg_debug_assert(ts->kind != TEMP_FIXED);
+ tcg_debug_assert(!temp_readonly(ts));
reg = tcg_target_call_oarg_regs[i];
tcg_debug_assert(s->reg_to_temp[reg] == NULL);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 03/19] tcg: Introduce TYPE_CONST temporaries
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
2020-05-08 18:25 ` [PATCH v4 01/19] tcg: Consolidate 3 bits into enum TCGTempKind Richard Henderson
2020-05-08 18:25 ` [PATCH v4 02/19] tcg: Add temp_readonly Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 04/19] tcg: Use tcg_constant_i32 with icount expander Richard Henderson
` (15 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
These will hold a single constant for the duration of the TB.
They are hashed, so that each value has one temp across the TB.
Not used yet, this is all infrastructure.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 27 +++++++-
tcg/optimize.c | 13 +++-
tcg/tcg-op-vec.c | 17 +++++
tcg/tcg.c | 170 ++++++++++++++++++++++++++++++++++------------
4 files changed, 182 insertions(+), 45 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 0d09ea7822..57d6b0216c 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -492,6 +492,8 @@ typedef enum TCGTempKind {
TEMP_GLOBAL,
/* Temp is in a fixed register. */
TEMP_FIXED,
+ /* Temp is a fixed constant. */
+ TEMP_CONST,
} TCGTempKind;
typedef struct TCGTemp {
@@ -667,6 +669,7 @@ struct TCGContext {
QSIMPLEQ_HEAD(, TCGOp) plugin_ops;
#endif
+ GHashTable *const_table[TCG_TYPE_COUNT];
TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
@@ -683,7 +686,7 @@ struct TCGContext {
static inline bool temp_readonly(TCGTemp *ts)
{
- return ts->kind == TEMP_FIXED;
+ return ts->kind >= TEMP_FIXED;
}
extern TCGContext tcg_init_ctx;
@@ -1041,6 +1044,7 @@ TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc);
void tcg_optimize(TCGContext *s);
+/* Allocate a new temporary and initialize it with a constant. */
TCGv_i32 tcg_const_i32(int32_t val);
TCGv_i64 tcg_const_i64(int64_t val);
TCGv_i32 tcg_const_local_i32(int32_t val);
@@ -1050,6 +1054,27 @@ TCGv_vec tcg_const_ones_vec(TCGType);
TCGv_vec tcg_const_zeros_vec_matching(TCGv_vec);
TCGv_vec tcg_const_ones_vec_matching(TCGv_vec);
+/*
+ * Locate or create a read-only temporary that is a constant.
+ * This kind of temporary need not and should not be freed.
+ */
+TCGTemp *tcg_constant_internal(TCGType type, tcg_target_long val);
+
+static inline TCGv_i32 tcg_constant_i32(int32_t val)
+{
+ return temp_tcgv_i32(tcg_constant_internal(TCG_TYPE_I32, val));
+}
+
+static inline TCGv_i64 tcg_constant_i64(int64_t val)
+{
+ if (TCG_TARGET_REG_BITS == 32) {
+ qemu_build_not_reached();
+ }
+ return temp_tcgv_i64(tcg_constant_internal(TCG_TYPE_I64, val));
+}
+
+TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val);
+
#if UINTPTR_MAX == UINT32_MAX
# define tcg_const_ptr(x) ((TCGv_ptr)tcg_const_i32((intptr_t)(x)))
# define tcg_const_local_ptr(x) ((TCGv_ptr)tcg_const_local_i32((intptr_t)(x)))
diff --git a/tcg/optimize.c b/tcg/optimize.c
index afb4a9a5a9..8f3bd99ff4 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -99,8 +99,17 @@ static void init_ts_info(struct tcg_temp_info *infos,
ts->state_ptr = ti;
ti->next_copy = ts;
ti->prev_copy = ts;
- ti->is_const = false;
- ti->mask = -1;
+ if (ts->kind == TEMP_CONST) {
+ ti->is_const = true;
+ ti->val = ti->mask = ts->val;
+ if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
+ /* High bits of a 32-bit quantity are garbage. */
+ ti->mask |= ~0xffffffffull;
+ }
+ } else {
+ ti->is_const = false;
+ ti->mask = -1;
+ }
set_bit(idx, temps_used->l);
}
}
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index f784517d84..43101defe4 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -209,6 +209,23 @@ static void vec_gen_op3(TCGOpcode opc, unsigned vece,
vec_gen_3(opc, type, vece, temp_arg(rt), temp_arg(at), temp_arg(bt));
}
+TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val)
+{
+ val = dup_const(vece, val);
+
+ /*
+ * For MO_64 constants that can't be represented in tcg_target_long,
+ * we must use INDEX_op_dup2_vec, which requires a non-const temporary.
+ */
+ if (TCG_TARGET_REG_BITS == 32 &&
+ val != deposit64(val, 32, 32, val) &&
+ val != (uint64_t)(int32_t)val) {
+ g_assert_not_reached();
+ }
+
+ return temp_tcgv_vec(tcg_constant_internal(type, val));
+}
+
void tcg_gen_mov_vec(TCGv_vec r, TCGv_vec a)
{
if (r != a) {
diff --git a/tcg/tcg.c b/tcg/tcg.c
index a529166026..94f7898317 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1127,6 +1127,7 @@ void tcg_func_start(TCGContext *s)
/* No temps have been previously allocated for size or locality. */
memset(s->free_temps, 0, sizeof(s->free_temps));
+ memset(s->const_table, 0, sizeof(s->const_table));
s->nb_ops = 0;
s->nb_labels = 0;
@@ -1199,13 +1200,19 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
bigendian = 1;
#endif
- if (base_ts->kind != TEMP_FIXED) {
+ switch (base_ts->kind) {
+ case TEMP_FIXED:
+ break;
+ case TEMP_GLOBAL:
/* We do not support double-indirect registers. */
tcg_debug_assert(!base_ts->indirect_reg);
base_ts->indirect_base = 1;
s->nb_indirects += (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64
? 2 : 1);
indirect_reg = 1;
+ break;
+ default:
+ g_assert_not_reached();
}
if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
@@ -1346,6 +1353,37 @@ void tcg_temp_free_internal(TCGTemp *ts)
set_bit(idx, s->free_temps[k].l);
}
+TCGTemp *tcg_constant_internal(TCGType type, tcg_target_long val)
+{
+ TCGContext *s = tcg_ctx;
+ GHashTable *h = s->const_table[type];
+ TCGTemp *ts;
+
+ if (h == NULL) {
+ if (sizeof(tcg_target_long) == sizeof(gint64)) {
+ h = g_hash_table_new(g_int64_hash, g_int64_equal);
+ } else if (sizeof(tcg_target_long) == sizeof(gint)) {
+ h = g_hash_table_new(g_int_hash, g_int_equal);
+ } else {
+ qemu_build_not_reached();
+ }
+ s->const_table[type] = h;
+ }
+
+ ts = g_hash_table_lookup(h, &val);
+ if (ts == NULL) {
+ ts = tcg_temp_alloc(s);
+ ts->base_type = type;
+ ts->type = type;
+ ts->kind = TEMP_CONST;
+ ts->temp_allocated = 1;
+ ts->val = val;
+ g_hash_table_insert(h, &ts->val, ts);
+ }
+
+ return ts;
+}
+
TCGv_i32 tcg_const_i32(int32_t val)
{
TCGv_i32 t0;
@@ -1878,6 +1916,9 @@ static void tcg_reg_alloc_start(TCGContext *s)
TCGTempVal val = TEMP_VAL_MEM;
switch (ts->kind) {
+ case TEMP_CONST:
+ val = TEMP_VAL_CONST;
+ break;
case TEMP_FIXED:
val = TEMP_VAL_REG;
break;
@@ -1914,6 +1955,26 @@ static char *tcg_get_arg_str_ptr(TCGContext *s, char *buf, int buf_size,
case TEMP_NORMAL:
snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
break;
+ case TEMP_CONST:
+ switch (ts->type) {
+ case TCG_TYPE_I32:
+ snprintf(buf, buf_size, "$0x%x", (int32_t)ts->val);
+ break;
+#if TCG_TARGET_REG_BITS > 32
+ case TCG_TYPE_I64:
+ snprintf(buf, buf_size, "$0x%" TCG_PRIlx, ts->val);
+ break;
+#endif
+ case TCG_TYPE_V64:
+ case TCG_TYPE_V128:
+ case TCG_TYPE_V256:
+ snprintf(buf, buf_size, "v%d$0x%" TCG_PRIlx,
+ 64 << (ts->type - TCG_TYPE_V64), ts->val);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ break;
}
return buf;
}
@@ -2520,6 +2581,7 @@ static void la_bb_end(TCGContext *s, int ng, int nt)
state = TS_DEAD | TS_MEM;
break;
case TEMP_NORMAL:
+ case TEMP_CONST:
state = TS_DEAD;
break;
default:
@@ -3173,15 +3235,28 @@ static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRegSet);
mark it free; otherwise mark it dead. */
static void temp_free_or_dead(TCGContext *s, TCGTemp *ts, int free_or_dead)
{
- if (temp_readonly(ts)) {
+ TCGTempVal new_type;
+
+ switch (ts->kind) {
+ case TEMP_FIXED:
return;
+ case TEMP_GLOBAL:
+ case TEMP_LOCAL:
+ new_type = TEMP_VAL_MEM;
+ break;
+ case TEMP_NORMAL:
+ new_type = free_or_dead < 0 ? TEMP_VAL_MEM : TEMP_VAL_DEAD;
+ break;
+ case TEMP_CONST:
+ new_type = TEMP_VAL_CONST;
+ break;
+ default:
+ g_assert_not_reached();
}
if (ts->val_type == TEMP_VAL_REG) {
s->reg_to_temp[ts->reg] = NULL;
}
- ts->val_type = (free_or_dead < 0
- || ts->kind != TEMP_NORMAL
- ? TEMP_VAL_MEM : TEMP_VAL_DEAD);
+ ts->val_type = new_type;
}
/* Mark a temporary as dead. */
@@ -3197,10 +3272,7 @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts)
static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
TCGRegSet preferred_regs, int free_or_dead)
{
- if (temp_readonly(ts)) {
- return;
- }
- if (!ts->mem_coherent) {
+ if (!temp_readonly(ts) && !ts->mem_coherent) {
if (!ts->mem_allocated) {
temp_allocate_frame(s, ts);
}
@@ -3393,12 +3465,22 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
for (i = s->nb_globals; i < s->nb_temps; i++) {
TCGTemp *ts = &s->temps[i];
- if (ts->kind == TEMP_LOCAL) {
+
+ switch (ts->kind) {
+ case TEMP_LOCAL:
temp_save(s, ts, allocated_regs);
- } else {
+ break;
+ case TEMP_NORMAL:
/* The liveness analysis already ensures that temps are dead.
Keep an tcg_debug_assert for safety. */
tcg_debug_assert(ts->val_type == TEMP_VAL_DEAD);
+ break;
+ case TEMP_CONST:
+ /* Similarly, we should have freed any allocated register. */
+ tcg_debug_assert(ts->val_type == TEMP_VAL_CONST);
+ break;
+ default:
+ g_assert_not_reached();
}
}
@@ -3691,46 +3773,43 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
i_preferred_regs = o_preferred_regs = 0;
if (arg_ct->ct & TCG_CT_IALIAS) {
o_preferred_regs = op->output_pref[arg_ct->alias_index];
- if (ts->kind == TEMP_FIXED) {
- /* if fixed register, we must allocate a new register
- if the alias is not the same register */
- if (arg != op->args[arg_ct->alias_index]) {
- goto allocate_in_reg;
- }
- } else {
- /* if the input is aliased to an output and if it is
- not dead after the instruction, we must allocate
- a new register and move it */
- if (!IS_DEAD_ARG(i)) {
- goto allocate_in_reg;
- }
- /* check if the current register has already been allocated
- for another input aliased to an output */
- if (ts->val_type == TEMP_VAL_REG) {
- int k2, i2;
- reg = ts->reg;
- for (k2 = 0 ; k2 < k ; k2++) {
- i2 = def->sorted_args[nb_oargs + k2];
- if ((def->args_ct[i2].ct & TCG_CT_IALIAS) &&
- reg == new_args[i2]) {
- goto allocate_in_reg;
- }
+ /*
+ * If the input is readonly, then it cannot also be an
+ * output and aliased to itself. If the input is not
+ * dead after the instruction, we must allocate a new
+ * register and move it.
+ */
+ if (temp_readonly(ts) || !IS_DEAD_ARG(i)) {
+ goto allocate_in_reg;
+ }
+
+ /*
+ * Check if the current register has already been allocated
+ * for another input aliased to an output.
+ */
+ if (ts->val_type == TEMP_VAL_REG) {
+ reg = ts->reg;
+ for (int k2 = 0; k2 < k; k2++) {
+ int i2 = def->sorted_args[nb_oargs + k2];
+ if ((def->args_ct[i2].ct & TCG_CT_IALIAS) &&
+ reg == new_args[i2]) {
+ goto allocate_in_reg;
}
}
- i_preferred_regs = o_preferred_regs;
}
+ i_preferred_regs = o_preferred_regs;
}
temp_load(s, ts, arg_ct->u.regs, i_allocated_regs, i_preferred_regs);
reg = ts->reg;
- if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
- /* nothing to do : the constraint is satisfied */
- } else {
- allocate_in_reg:
- /* allocate a new register matching the constraint
- and move the temporary register into it */
+ if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
+ allocate_in_reg:
+ /*
+ * Allocate a new register matching the constraint
+ * and move the temporary register into it.
+ */
temp_load(s, ts, tcg_target_available_regs[ts->type],
i_allocated_regs, 0);
reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs,
@@ -4189,6 +4268,13 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
}
#endif
+ for (i = 0; i < TCG_TYPE_COUNT; ++i) {
+ if (s->const_table[i]) {
+ g_hash_table_destroy(s->const_table[i]);
+ s->const_table[i] = NULL;
+ }
+ }
+
tcg_reg_alloc_start(s);
s->code_buf = tb->tc.ptr;
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 04/19] tcg: Use tcg_constant_i32 with icount expander
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (2 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 03/19] tcg: Introduce TYPE_CONST temporaries Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 05/19] tcg: Use tcg_constant_{i32, i64} with tcg int expanders Richard Henderson
` (14 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
We must do this before we adjust how tcg_out_movi_i32,
lest the under-the-hood poking that we do be broken.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/gen-icount.h | 25 +++++++++++++------------
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 822c43cfd3..404732518a 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -34,7 +34,7 @@ static inline void gen_io_end(void)
static inline void gen_tb_start(TranslationBlock *tb)
{
- TCGv_i32 count, imm;
+ TCGv_i32 count;
tcg_ctx->exitreq_label = gen_new_label();
if (tb_cflags(tb) & CF_USE_ICOUNT) {
@@ -48,15 +48,13 @@ static inline void gen_tb_start(TranslationBlock *tb)
offsetof(ArchCPU, env));
if (tb_cflags(tb) & CF_USE_ICOUNT) {
- imm = tcg_temp_new_i32();
- /* We emit a movi with a dummy immediate argument. Keep the insn index
- * of the movi so that we later (when we know the actual insn count)
- * can update the immediate argument with the actual insn count. */
- tcg_gen_movi_i32(imm, 0xdeadbeef);
+ /*
+ * We emit a sub with a dummy immediate argument. Keep the insn index
+ * of the sub so that we later (when we know the actual insn count)
+ * can update the argument with the actual insn count.
+ */
+ tcg_gen_sub_i32(count, count, tcg_constant_i32(0));
icount_start_insn = tcg_last_op();
-
- tcg_gen_sub_i32(count, count, imm);
- tcg_temp_free_i32(imm);
}
tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label);
@@ -74,9 +72,12 @@ static inline void gen_tb_start(TranslationBlock *tb)
static inline void gen_tb_end(TranslationBlock *tb, int num_insns)
{
if (tb_cflags(tb) & CF_USE_ICOUNT) {
- /* Update the num_insn immediate parameter now that we know
- * the actual insn count. */
- tcg_set_insn_param(icount_start_insn, 1, num_insns);
+ /*
+ * Update the num_insn immediate parameter now that we know
+ * the actual insn count.
+ */
+ tcg_set_insn_param(icount_start_insn, 2,
+ tcgv_i32_arg(tcg_constant_i32(num_insns)));
}
gen_set_label(tcg_ctx->exitreq_label);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 05/19] tcg: Use tcg_constant_{i32, i64} with tcg int expanders
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (3 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 04/19] tcg: Use tcg_constant_i32 with icount expander Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 06/19] tcg: Use tcg_constant_{i32, vec} with tcg vec expanders Richard Henderson
` (13 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg-op.h | 13 +--
tcg/tcg-op.c | 216 ++++++++++++++++++++-----------------------
2 files changed, 100 insertions(+), 129 deletions(-)
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 5abf17fecc..b4fba35e87 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -271,6 +271,7 @@ void tcg_gen_mb(TCGBar);
/* 32 bit ops */
+void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg);
void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
@@ -349,11 +350,6 @@ static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
}
}
-static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
-{
- tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
-}
-
static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
tcg_target_long offset)
{
@@ -467,6 +463,7 @@ static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
/* 64 bit ops */
+void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
@@ -550,11 +547,6 @@ static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
}
}
-static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
-{
- tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
-}
-
static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
tcg_target_long offset)
{
@@ -698,7 +690,6 @@ static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
void tcg_gen_discard_i64(TCGv_i64 arg);
void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
-void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index e60b74fb82..202d8057c5 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -104,15 +104,18 @@ void tcg_gen_mb(TCGBar mb_type)
/* 32 bit ops */
+void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
+{
+ tcg_gen_mov_i32(ret, tcg_constant_i32(arg));
+}
+
void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
{
/* some cases can be optimized here */
if (arg2 == 0) {
tcg_gen_mov_i32(ret, arg1);
} else {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_add_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_add_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
@@ -122,9 +125,7 @@ void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2)
/* Don't recurse with tcg_gen_neg_i32. */
tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg2);
} else {
- TCGv_i32 t0 = tcg_const_i32(arg1);
- tcg_gen_sub_i32(ret, t0, arg2);
- tcg_temp_free_i32(t0);
+ tcg_gen_sub_i32(ret, tcg_constant_i32(arg1), arg2);
}
}
@@ -134,15 +135,12 @@ void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
if (arg2 == 0) {
tcg_gen_mov_i32(ret, arg1);
} else {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_sub_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_sub_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
{
- TCGv_i32 t0;
/* Some cases can be optimized here. */
switch (arg2) {
case 0:
@@ -165,9 +163,8 @@ void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
}
break;
}
- t0 = tcg_const_i32(arg2);
- tcg_gen_and_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+
+ tcg_gen_and_i32(ret, arg1, tcg_constant_i32(arg2));
}
void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
@@ -178,9 +175,7 @@ void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
} else if (arg2 == 0) {
tcg_gen_mov_i32(ret, arg1);
} else {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_or_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_or_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
@@ -193,9 +188,7 @@ void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
/* Don't recurse with tcg_gen_not_i32. */
tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg1);
} else {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_xor_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_xor_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
@@ -205,9 +198,7 @@ void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
if (arg2 == 0) {
tcg_gen_mov_i32(ret, arg1);
} else {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_shl_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_shl_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
@@ -217,9 +208,7 @@ void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
if (arg2 == 0) {
tcg_gen_mov_i32(ret, arg1);
} else {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_shr_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_shr_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
@@ -229,9 +218,7 @@ void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
if (arg2 == 0) {
tcg_gen_mov_i32(ret, arg1);
} else {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_sar_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_sar_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
@@ -250,9 +237,7 @@ void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *l)
if (cond == TCG_COND_ALWAYS) {
tcg_gen_br(l);
} else if (cond != TCG_COND_NEVER) {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_brcond_i32(cond, arg1, t0, l);
- tcg_temp_free_i32(t0);
+ tcg_gen_brcond_i32(cond, arg1, tcg_constant_i32(arg2), l);
}
}
@@ -271,9 +256,7 @@ void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
TCGv_i32 arg1, int32_t arg2)
{
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_setcond_i32(cond, ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_setcond_i32(cond, ret, arg1, tcg_constant_i32(arg2));
}
void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
@@ -283,9 +266,7 @@ void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
} else if (is_power_of_2(arg2)) {
tcg_gen_shli_i32(ret, arg1, ctz32(arg2));
} else {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_mul_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_mul_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
@@ -433,9 +414,7 @@ void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2)
{
- TCGv_i32 t = tcg_const_i32(arg2);
- tcg_gen_clz_i32(ret, arg1, t);
- tcg_temp_free_i32(t);
+ tcg_gen_clz_i32(ret, arg1, tcg_constant_i32(arg2));
}
void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
@@ -468,10 +447,9 @@ void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
tcg_gen_clzi_i32(t, t, 32);
tcg_gen_xori_i32(t, t, 31);
}
- z = tcg_const_i32(0);
+ z = tcg_constant_i32(0);
tcg_gen_movcond_i32(TCG_COND_EQ, ret, arg1, z, arg2, t);
tcg_temp_free_i32(t);
- tcg_temp_free_i32(z);
} else {
gen_helper_ctz_i32(ret, arg1, arg2);
}
@@ -487,9 +465,7 @@ void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2)
tcg_gen_ctpop_i32(ret, t);
tcg_temp_free_i32(t);
} else {
- TCGv_i32 t = tcg_const_i32(arg2);
- tcg_gen_ctz_i32(ret, arg1, t);
- tcg_temp_free_i32(t);
+ tcg_gen_ctz_i32(ret, arg1, tcg_constant_i32(arg2));
}
}
@@ -547,9 +523,7 @@ void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
if (arg2 == 0) {
tcg_gen_mov_i32(ret, arg1);
} else if (TCG_TARGET_HAS_rot_i32) {
- TCGv_i32 t0 = tcg_const_i32(arg2);
- tcg_gen_rotl_i32(ret, arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_rotl_i32(ret, arg1, tcg_constant_i32(arg2));
} else {
TCGv_i32 t0, t1;
t0 = tcg_temp_new_i32();
@@ -653,9 +627,8 @@ void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
tcg_gen_andi_i32(ret, arg, (1u << len) - 1);
} else if (TCG_TARGET_HAS_deposit_i32
&& TCG_TARGET_deposit_i32_valid(ofs, len)) {
- TCGv_i32 zero = tcg_const_i32(0);
+ TCGv_i32 zero = tcg_constant_i32(0);
tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, zero, arg, ofs, len);
- tcg_temp_free_i32(zero);
} else {
/* To help two-operand hosts we prefer to zero-extend first,
which allows ARG to stay live. */
@@ -1052,7 +1025,7 @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg)
} else {
TCGv_i32 t0 = tcg_temp_new_i32();
TCGv_i32 t1 = tcg_temp_new_i32();
- TCGv_i32 t2 = tcg_const_i32(0x00ff00ff);
+ TCGv_i32 t2 = tcg_constant_i32(0x00ff00ff);
/* arg = abcd */
tcg_gen_shri_i32(t0, arg, 8); /* t0 = .abc */
@@ -1067,7 +1040,6 @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg)
tcg_temp_free_i32(t0);
tcg_temp_free_i32(t1);
- tcg_temp_free_i32(t2);
}
}
@@ -1237,6 +1209,14 @@ void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
tcg_temp_free_i64(t0);
tcg_temp_free_i32(t1);
}
+
+#else
+
+void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
+{
+ tcg_gen_mov_i64(ret, tcg_constant_i64(arg));
+}
+
#endif /* TCG_TARGET_REG_SIZE == 32 */
void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
@@ -1244,10 +1224,12 @@ void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
/* some cases can be optimized here */
if (arg2 == 0) {
tcg_gen_mov_i64(ret, arg1);
+ } else if (TCG_TARGET_REG_BITS == 64) {
+ tcg_gen_add_i64(ret, arg1, tcg_constant_i64(arg2));
} else {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_add_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret),
+ TCGV_LOW(arg1), TCGV_HIGH(arg1),
+ tcg_constant_i32(arg2), tcg_constant_i32(arg2 >> 32));
}
}
@@ -1256,10 +1238,12 @@ void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2)
if (arg1 == 0 && TCG_TARGET_HAS_neg_i64) {
/* Don't recurse with tcg_gen_neg_i64. */
tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg2);
+ } else if (TCG_TARGET_REG_BITS == 64) {
+ tcg_gen_sub_i64(ret, tcg_constant_i64(arg1), arg2);
} else {
- TCGv_i64 t0 = tcg_const_i64(arg1);
- tcg_gen_sub_i64(ret, t0, arg2);
- tcg_temp_free_i64(t0);
+ tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret),
+ tcg_constant_i32(arg1), tcg_constant_i32(arg1 >> 32),
+ TCGV_LOW(arg2), TCGV_HIGH(arg2));
}
}
@@ -1268,17 +1252,17 @@ void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
/* some cases can be optimized here */
if (arg2 == 0) {
tcg_gen_mov_i64(ret, arg1);
+ } else if (TCG_TARGET_REG_BITS == 64) {
+ tcg_gen_sub_i64(ret, arg1, tcg_constant_i64(arg2));
} else {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_sub_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret),
+ TCGV_LOW(arg1), TCGV_HIGH(arg1),
+ tcg_constant_i32(arg2), tcg_constant_i32(arg2 >> 32));
}
}
void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
{
- TCGv_i64 t0;
-
if (TCG_TARGET_REG_BITS == 32) {
tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
@@ -1313,9 +1297,8 @@ void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
}
break;
}
- t0 = tcg_const_i64(arg2);
- tcg_gen_and_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+
+ tcg_gen_and_i64(ret, arg1, tcg_constant_i64(arg2));
}
void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
@@ -1331,9 +1314,7 @@ void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
} else if (arg2 == 0) {
tcg_gen_mov_i64(ret, arg1);
} else {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_or_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_or_i64(ret, arg1, tcg_constant_i64(arg2));
}
}
@@ -1351,9 +1332,7 @@ void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
/* Don't recurse with tcg_gen_not_i64. */
tcg_gen_op2_i64(INDEX_op_not_i64, ret, arg1);
} else {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_xor_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_xor_i64(ret, arg1, tcg_constant_i64(arg2));
}
}
@@ -1415,9 +1394,7 @@ void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
} else if (arg2 == 0) {
tcg_gen_mov_i64(ret, arg1);
} else {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_shl_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_shl_i64(ret, arg1, tcg_constant_i64(arg2));
}
}
@@ -1429,9 +1406,7 @@ void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
} else if (arg2 == 0) {
tcg_gen_mov_i64(ret, arg1);
} else {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_shr_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_shr_i64(ret, arg1, tcg_constant_i64(arg2));
}
}
@@ -1443,9 +1418,7 @@ void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
} else if (arg2 == 0) {
tcg_gen_mov_i64(ret, arg1);
} else {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_sar_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_sar_i64(ret, arg1, tcg_constant_i64(arg2));
}
}
@@ -1468,12 +1441,17 @@ void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *l)
void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *l)
{
- if (cond == TCG_COND_ALWAYS) {
+ if (TCG_TARGET_REG_BITS == 64) {
+ tcg_gen_brcond_i64(cond, arg1, tcg_constant_i64(arg2), l);
+ } else if (cond == TCG_COND_ALWAYS) {
tcg_gen_br(l);
} else if (cond != TCG_COND_NEVER) {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_brcond_i64(cond, arg1, t0, l);
- tcg_temp_free_i64(t0);
+ l->refs++;
+ tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
+ TCGV_LOW(arg1), TCGV_HIGH(arg1),
+ tcg_constant_i32(arg2),
+ tcg_constant_i32(arg2 >> 32),
+ cond, label_arg(l));
}
}
@@ -1499,9 +1477,19 @@ void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
TCGv_i64 arg1, int64_t arg2)
{
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_setcond_i64(cond, ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ if (TCG_TARGET_REG_BITS == 64) {
+ tcg_gen_setcond_i64(cond, ret, arg1, tcg_constant_i64(arg2));
+ } else if (cond == TCG_COND_ALWAYS) {
+ tcg_gen_movi_i64(ret, 1);
+ } else if (cond == TCG_COND_NEVER) {
+ tcg_gen_movi_i64(ret, 0);
+ } else {
+ tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret),
+ TCGV_LOW(arg1), TCGV_HIGH(arg1),
+ tcg_constant_i32(arg2),
+ tcg_constant_i32(arg2 >> 32), cond);
+ tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
+ }
}
void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
@@ -1690,7 +1678,7 @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
} else {
TCGv_i64 t0 = tcg_temp_new_i64();
TCGv_i64 t1 = tcg_temp_new_i64();
- TCGv_i64 t2 = tcg_const_i64(0x00ff00ff);
+ TCGv_i64 t2 = tcg_constant_i64(0x00ff00ff);
/* arg = ....abcd */
tcg_gen_shri_i64(t0, arg, 8); /* t0 = .....abc */
@@ -1706,7 +1694,6 @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
- tcg_temp_free_i64(t2);
}
}
@@ -1850,16 +1837,16 @@ void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
if (TCG_TARGET_REG_BITS == 32
&& TCG_TARGET_HAS_clz_i32
&& arg2 <= 0xffffffffu) {
- TCGv_i32 t = tcg_const_i32((uint32_t)arg2 - 32);
- tcg_gen_clz_i32(t, TCGV_LOW(arg1), t);
+ TCGv_i32 t = tcg_temp_new_i32();
+ tcg_gen_clzi_i32(t, TCGV_LOW(arg1), arg2 - 32);
tcg_gen_addi_i32(t, t, 32);
tcg_gen_clz_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), t);
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
tcg_temp_free_i32(t);
} else {
- TCGv_i64 t = tcg_const_i64(arg2);
- tcg_gen_clz_i64(ret, arg1, t);
- tcg_temp_free_i64(t);
+ TCGv_i64 t0 = tcg_const_i64(arg2);
+ tcg_gen_clz_i64(ret, arg1, t0);
+ tcg_temp_free_i64(t0);
}
}
@@ -1881,7 +1868,7 @@ void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
tcg_gen_clzi_i64(t, t, 64);
tcg_gen_xori_i64(t, t, 63);
}
- z = tcg_const_i64(0);
+ z = tcg_constant_i64(0);
tcg_gen_movcond_i64(TCG_COND_EQ, ret, arg1, z, arg2, t);
tcg_temp_free_i64(t);
tcg_temp_free_i64(z);
@@ -1895,8 +1882,8 @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
if (TCG_TARGET_REG_BITS == 32
&& TCG_TARGET_HAS_ctz_i32
&& arg2 <= 0xffffffffu) {
- TCGv_i32 t32 = tcg_const_i32((uint32_t)arg2 - 32);
- tcg_gen_ctz_i32(t32, TCGV_HIGH(arg1), t32);
+ TCGv_i32 t32 = tcg_temp_new_i32();
+ tcg_gen_ctzi_i32(t32, TCGV_HIGH(arg1), arg2 - 32);
tcg_gen_addi_i32(t32, t32, 32);
tcg_gen_ctz_i32(TCGV_LOW(ret), TCGV_LOW(arg1), t32);
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
@@ -1911,9 +1898,9 @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
tcg_gen_ctpop_i64(ret, t);
tcg_temp_free_i64(t);
} else {
- TCGv_i64 t64 = tcg_const_i64(arg2);
- tcg_gen_ctz_i64(ret, arg1, t64);
- tcg_temp_free_i64(t64);
+ TCGv_i64 t0 = tcg_const_i64(arg2);
+ tcg_gen_ctz_i64(ret, arg1, t0);
+ tcg_temp_free_i64(t0);
}
}
@@ -1969,9 +1956,7 @@ void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
if (arg2 == 0) {
tcg_gen_mov_i64(ret, arg1);
} else if (TCG_TARGET_HAS_rot_i64) {
- TCGv_i64 t0 = tcg_const_i64(arg2);
- tcg_gen_rotl_i64(ret, arg1, t0);
- tcg_temp_free_i64(t0);
+ tcg_gen_rotl_i64(ret, arg1, tcg_constant_i64(arg2));
} else {
TCGv_i64 t0, t1;
t0 = tcg_temp_new_i64();
@@ -2089,9 +2074,8 @@ void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
tcg_gen_andi_i64(ret, arg, (1ull << len) - 1);
} else if (TCG_TARGET_HAS_deposit_i64
&& TCG_TARGET_deposit_i64_valid(ofs, len)) {
- TCGv_i64 zero = tcg_const_i64(0);
+ TCGv_i64 zero = tcg_constant_i64(0);
tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, zero, arg, ofs, len);
- tcg_temp_free_i64(zero);
} else {
if (TCG_TARGET_REG_BITS == 32) {
if (ofs >= 32) {
@@ -3102,9 +3086,8 @@ void tcg_gen_atomic_cmpxchg_i32(TCGv_i32 retv, TCGv addr, TCGv_i32 cmpv,
#ifdef CONFIG_SOFTMMU
{
- TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx));
- gen(retv, cpu_env, addr, cmpv, newv, oi);
- tcg_temp_free_i32(oi);
+ TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
+ gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi));
}
#else
gen(retv, cpu_env, addr, cmpv, newv);
@@ -3147,9 +3130,8 @@ void tcg_gen_atomic_cmpxchg_i64(TCGv_i64 retv, TCGv addr, TCGv_i64 cmpv,
#ifdef CONFIG_SOFTMMU
{
- TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop, idx));
- gen(retv, cpu_env, addr, cmpv, newv, oi);
- tcg_temp_free_i32(oi);
+ TCGMemOpIdx oi = make_memop_idx(memop, idx);
+ gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi));
}
#else
gen(retv, cpu_env, addr, cmpv, newv);
@@ -3210,9 +3192,8 @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val,
#ifdef CONFIG_SOFTMMU
{
- TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx));
- gen(ret, cpu_env, addr, val, oi);
- tcg_temp_free_i32(oi);
+ TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
+ gen(ret, cpu_env, addr, val, tcg_constant_i32(oi));
}
#else
gen(ret, cpu_env, addr, val);
@@ -3255,9 +3236,8 @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val,
#ifdef CONFIG_SOFTMMU
{
- TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx));
- gen(ret, cpu_env, addr, val, oi);
- tcg_temp_free_i32(oi);
+ TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
+ gen(ret, cpu_env, addr, val, tcg_constant_i32(oi));
}
#else
gen(ret, cpu_env, addr, val);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 06/19] tcg: Use tcg_constant_{i32, vec} with tcg vec expanders
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (4 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 05/19] tcg: Use tcg_constant_{i32, i64} with tcg int expanders Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 07/19] tcg: Use tcg_constant_{i32, i64, vec} with tcg gvec expanders Richard Henderson
` (12 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg-op-vec.c | 63 ++++++++++++++++++++++++++----------------------
1 file changed, 34 insertions(+), 29 deletions(-)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index 43101defe4..0e3e80a612 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -233,25 +233,17 @@ void tcg_gen_mov_vec(TCGv_vec r, TCGv_vec a)
}
}
-#define MO_REG (TCG_TARGET_REG_BITS == 64 ? MO_64 : MO_32)
-
-static void do_dupi_vec(TCGv_vec r, unsigned vece, TCGArg a)
-{
- TCGTemp *rt = tcgv_vec_temp(r);
- vec_gen_2(INDEX_op_dupi_vec, rt->base_type, vece, temp_arg(rt), a);
-}
-
TCGv_vec tcg_const_zeros_vec(TCGType type)
{
TCGv_vec ret = tcg_temp_new_vec(type);
- do_dupi_vec(ret, MO_REG, 0);
+ tcg_gen_mov_vec(ret, tcg_constant_vec(type, MO_8, 0));
return ret;
}
TCGv_vec tcg_const_ones_vec(TCGType type)
{
TCGv_vec ret = tcg_temp_new_vec(type);
- do_dupi_vec(ret, MO_REG, -1);
+ tcg_gen_mov_vec(ret, tcg_constant_vec(type, MO_8, -1));
return ret;
}
@@ -267,37 +259,50 @@ TCGv_vec tcg_const_ones_vec_matching(TCGv_vec m)
return tcg_const_ones_vec(t->base_type);
}
-void tcg_gen_dup64i_vec(TCGv_vec r, uint64_t a)
+void tcg_gen_dupi_vec(unsigned vece, TCGv_vec dest, uint64_t val)
{
- if (TCG_TARGET_REG_BITS == 32 && a == deposit64(a, 32, 32, a)) {
- do_dupi_vec(r, MO_32, a);
- } else if (TCG_TARGET_REG_BITS == 64 || a == (uint64_t)(int32_t)a) {
- do_dupi_vec(r, MO_64, a);
- } else {
- TCGv_i64 c = tcg_const_i64(a);
- tcg_gen_dup_i64_vec(MO_64, r, c);
- tcg_temp_free_i64(c);
+ TCGType type = tcgv_vec_temp(dest)->base_type;
+
+ /*
+ * For MO_64 constants that can't be represented in tcg_target_long,
+ * we must use INDEX_op_dup2_vec.
+ */
+ if (TCG_TARGET_REG_BITS == 32) {
+ val = dup_const(vece, val);
+ if (val != deposit64(val, 32, 32, val) &&
+ val != (uint64_t)(int32_t)val) {
+ uint32_t vl = extract64(val, 0, 32);
+ uint32_t vh = extract64(val, 32, 32);
+ TCGArg al = tcgv_i32_arg(tcg_constant_i32(vl));
+ TCGArg ah = tcgv_i32_arg(tcg_constant_i32(vh));
+ TCGArg di = tcgv_vec_arg(dest);
+
+ vec_gen_3(INDEX_op_dup2_vec, type, MO_64, di, al, ah);
+ return;
+ }
}
+
+ tcg_gen_mov_vec(dest, tcg_constant_vec(type, vece, val));
}
-void tcg_gen_dup32i_vec(TCGv_vec r, uint32_t a)
+void tcg_gen_dup64i_vec(TCGv_vec dest, uint64_t val)
{
- do_dupi_vec(r, MO_REG, dup_const(MO_32, a));
+ tcg_gen_dupi_vec(MO_64, dest, val);
}
-void tcg_gen_dup16i_vec(TCGv_vec r, uint32_t a)
+void tcg_gen_dup32i_vec(TCGv_vec dest, uint32_t val)
{
- do_dupi_vec(r, MO_REG, dup_const(MO_16, a));
+ tcg_gen_dupi_vec(MO_32, dest, val);
}
-void tcg_gen_dup8i_vec(TCGv_vec r, uint32_t a)
+void tcg_gen_dup16i_vec(TCGv_vec dest, uint32_t val)
{
- do_dupi_vec(r, MO_REG, dup_const(MO_8, a));
+ tcg_gen_dupi_vec(MO_16, dest, val);
}
-void tcg_gen_dupi_vec(unsigned vece, TCGv_vec r, uint64_t a)
+void tcg_gen_dup8i_vec(TCGv_vec dest, uint32_t val)
{
- do_dupi_vec(r, MO_REG, dup_const(vece, a));
+ tcg_gen_dupi_vec(MO_8, dest, val);
}
void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec r, TCGv_i64 a)
@@ -502,8 +507,8 @@ void tcg_gen_abs_vec(unsigned vece, TCGv_vec r, TCGv_vec a)
if (tcg_can_emit_vec_op(INDEX_op_sari_vec, type, vece) > 0) {
tcg_gen_sari_vec(vece, t, a, (8 << vece) - 1);
} else {
- do_dupi_vec(t, MO_REG, 0);
- tcg_gen_cmp_vec(TCG_COND_LT, vece, t, a, t);
+ tcg_gen_cmp_vec(TCG_COND_LT, vece, t, a,
+ tcg_constant_vec(type, vece, 0));
}
tcg_gen_xor_vec(vece, r, a, t);
tcg_gen_sub_vec(vece, r, r, t);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 07/19] tcg: Use tcg_constant_{i32, i64, vec} with tcg gvec expanders
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (5 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 06/19] tcg: Use tcg_constant_{i32, vec} with tcg vec expanders Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 19:22 ` [PATCH v4 07/19] tcg: Use tcg_constant_{i32,i64,vec} " Richard Henderson
2020-05-08 18:26 ` [PATCH v4 08/19] tcg: Use tcg_constant_{i32,i64} with tcg plugins Richard Henderson
` (11 subsequent siblings)
18 siblings, 1 reply; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg-op-gvec.c | 125 +++++++++++++++++++---------------------------
1 file changed, 50 insertions(+), 75 deletions(-)
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
index 3707c0effb..8ecaf4d67e 100644
--- a/tcg/tcg-op-gvec.c
+++ b/tcg/tcg-op-gvec.c
@@ -96,7 +96,7 @@ void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
gen_helper_gvec_2 *fn)
{
TCGv_ptr a0, a1;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -108,7 +108,6 @@ void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
tcg_temp_free_ptr(a0);
tcg_temp_free_ptr(a1);
- tcg_temp_free_i32(desc);
}
/* Generate a call to a gvec-style helper with two vector operands
@@ -118,7 +117,7 @@ void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c,
gen_helper_gvec_2i *fn)
{
TCGv_ptr a0, a1;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -130,7 +129,6 @@ void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c,
tcg_temp_free_ptr(a0);
tcg_temp_free_ptr(a1);
- tcg_temp_free_i32(desc);
}
/* Generate a call to a gvec-style helper with three vector operands. */
@@ -139,7 +137,7 @@ void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
gen_helper_gvec_3 *fn)
{
TCGv_ptr a0, a1, a2;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -154,7 +152,6 @@ void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
tcg_temp_free_ptr(a0);
tcg_temp_free_ptr(a1);
tcg_temp_free_ptr(a2);
- tcg_temp_free_i32(desc);
}
/* Generate a call to a gvec-style helper with four vector operands. */
@@ -163,7 +160,7 @@ void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
int32_t data, gen_helper_gvec_4 *fn)
{
TCGv_ptr a0, a1, a2, a3;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -181,7 +178,6 @@ void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
tcg_temp_free_ptr(a1);
tcg_temp_free_ptr(a2);
tcg_temp_free_ptr(a3);
- tcg_temp_free_i32(desc);
}
/* Generate a call to a gvec-style helper with five vector operands. */
@@ -190,7 +186,7 @@ void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn)
{
TCGv_ptr a0, a1, a2, a3, a4;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -211,7 +207,6 @@ void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
tcg_temp_free_ptr(a2);
tcg_temp_free_ptr(a3);
tcg_temp_free_ptr(a4);
- tcg_temp_free_i32(desc);
}
/* Generate a call to a gvec-style helper with three vector operands
@@ -221,7 +216,7 @@ void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
int32_t data, gen_helper_gvec_2_ptr *fn)
{
TCGv_ptr a0, a1;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -233,7 +228,6 @@ void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
tcg_temp_free_ptr(a0);
tcg_temp_free_ptr(a1);
- tcg_temp_free_i32(desc);
}
/* Generate a call to a gvec-style helper with three vector operands
@@ -243,7 +237,7 @@ void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
int32_t data, gen_helper_gvec_3_ptr *fn)
{
TCGv_ptr a0, a1, a2;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -258,7 +252,6 @@ void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
tcg_temp_free_ptr(a0);
tcg_temp_free_ptr(a1);
tcg_temp_free_ptr(a2);
- tcg_temp_free_i32(desc);
}
/* Generate a call to a gvec-style helper with four vector operands
@@ -269,7 +262,7 @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
gen_helper_gvec_4_ptr *fn)
{
TCGv_ptr a0, a1, a2, a3;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -287,7 +280,6 @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
tcg_temp_free_ptr(a1);
tcg_temp_free_ptr(a2);
tcg_temp_free_ptr(a3);
- tcg_temp_free_i32(desc);
}
/* Generate a call to a gvec-style helper with five vector operands
@@ -298,7 +290,7 @@ void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
gen_helper_gvec_5_ptr *fn)
{
TCGv_ptr a0, a1, a2, a3, a4;
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
a0 = tcg_temp_new_ptr();
a1 = tcg_temp_new_ptr();
@@ -319,7 +311,6 @@ void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
tcg_temp_free_ptr(a2);
tcg_temp_free_ptr(a3);
tcg_temp_free_ptr(a4);
- tcg_temp_free_i32(desc);
}
/* Return true if we want to implement something of OPRSZ bytes
@@ -609,16 +600,13 @@ static void do_dup(unsigned vece, uint32_t dofs, uint32_t oprsz,
/* Otherwise implement out of line. */
t_ptr = tcg_temp_new_ptr();
tcg_gen_addi_ptr(t_ptr, cpu_env, dofs);
- t_desc = tcg_const_i32(simd_desc(oprsz, maxsz, 0));
+ t_desc = tcg_constant_i32(simd_desc(oprsz, maxsz, 0));
if (vece == MO_64) {
- if (in_64) {
- gen_helper_gvec_dup64(t_ptr, t_desc, in_64);
- } else {
- t_64 = tcg_const_i64(in_c);
- gen_helper_gvec_dup64(t_ptr, t_desc, t_64);
- tcg_temp_free_i64(t_64);
+ if (!in_64) {
+ in_64 = tcg_constant_i64(in_c);
}
+ gen_helper_gvec_dup64(t_ptr, t_desc, in_64);
} else {
typedef void dup_fn(TCGv_ptr, TCGv_i32, TCGv_i32);
static dup_fn * const fns[3] = {
@@ -646,7 +634,6 @@ static void do_dup(unsigned vece, uint32_t dofs, uint32_t oprsz,
}
tcg_temp_free_ptr(t_ptr);
- tcg_temp_free_i32(t_desc);
return;
done:
@@ -1196,10 +1183,8 @@ void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
if (g->fno) {
tcg_gen_gvec_2_ool(dofs, aofs, oprsz, maxsz, c, g->fno);
} else {
- TCGv_i64 tcg_c = tcg_const_i64(c);
- tcg_gen_gvec_2i_ool(dofs, aofs, tcg_c, oprsz,
- maxsz, c, g->fnoi);
- tcg_temp_free_i64(tcg_c);
+ tcg_gen_gvec_2i_ool(dofs, aofs, tcg_constant_i64(c),
+ oprsz, maxsz, 0, g->fnoi);
}
oprsz = maxsz;
}
@@ -1647,16 +1632,14 @@ static void gen_addv_mask(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, TCGv_i64 m)
void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
- TCGv_i64 m = tcg_const_i64(dup_const(MO_8, 0x80));
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80));
gen_addv_mask(d, a, b, m);
- tcg_temp_free_i64(m);
}
void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
- TCGv_i64 m = tcg_const_i64(dup_const(MO_16, 0x8000));
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_16, 0x8000));
gen_addv_mask(d, a, b, m);
- tcg_temp_free_i64(m);
}
void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
@@ -1740,9 +1723,8 @@ void tcg_gen_gvec_adds(unsigned vece, uint32_t dofs, uint32_t aofs,
void tcg_gen_gvec_addi(unsigned vece, uint32_t dofs, uint32_t aofs,
int64_t c, uint32_t oprsz, uint32_t maxsz)
{
- TCGv_i64 tmp = tcg_const_i64(c);
+ TCGv_i64 tmp = tcg_constant_i64(c);
tcg_gen_gvec_adds(vece, dofs, aofs, tmp, oprsz, maxsz);
- tcg_temp_free_i64(tmp);
}
static const TCGOpcode vecop_list_sub[] = { INDEX_op_sub_vec, 0 };
@@ -1800,16 +1782,14 @@ static void gen_subv_mask(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, TCGv_i64 m)
void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
- TCGv_i64 m = tcg_const_i64(dup_const(MO_8, 0x80));
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80));
gen_subv_mask(d, a, b, m);
- tcg_temp_free_i64(m);
}
void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
- TCGv_i64 m = tcg_const_i64(dup_const(MO_16, 0x8000));
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_16, 0x8000));
gen_subv_mask(d, a, b, m);
- tcg_temp_free_i64(m);
}
void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
@@ -1920,9 +1900,8 @@ void tcg_gen_gvec_muls(unsigned vece, uint32_t dofs, uint32_t aofs,
void tcg_gen_gvec_muli(unsigned vece, uint32_t dofs, uint32_t aofs,
int64_t c, uint32_t oprsz, uint32_t maxsz)
{
- TCGv_i64 tmp = tcg_const_i64(c);
+ TCGv_i64 tmp = tcg_constant_i64(c);
tcg_gen_gvec_muls(vece, dofs, aofs, tmp, oprsz, maxsz);
- tcg_temp_free_i64(tmp);
}
void tcg_gen_gvec_ssadd(unsigned vece, uint32_t dofs, uint32_t aofs,
@@ -1979,18 +1958,16 @@ void tcg_gen_gvec_sssub(unsigned vece, uint32_t dofs, uint32_t aofs,
static void tcg_gen_usadd_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
{
- TCGv_i32 max = tcg_const_i32(-1);
+ TCGv_i32 max = tcg_constant_i32(-1);
tcg_gen_add_i32(d, a, b);
tcg_gen_movcond_i32(TCG_COND_LTU, d, d, a, max, d);
- tcg_temp_free_i32(max);
}
static void tcg_gen_usadd_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
- TCGv_i64 max = tcg_const_i64(-1);
+ TCGv_i64 max = tcg_constant_i64(-1);
tcg_gen_add_i64(d, a, b);
tcg_gen_movcond_i64(TCG_COND_LTU, d, d, a, max, d);
- tcg_temp_free_i64(max);
}
void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
@@ -2023,18 +2000,16 @@ void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
static void tcg_gen_ussub_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
{
- TCGv_i32 min = tcg_const_i32(0);
+ TCGv_i32 min = tcg_constant_i32(0);
tcg_gen_sub_i32(d, a, b);
tcg_gen_movcond_i32(TCG_COND_LTU, d, a, b, min, d);
- tcg_temp_free_i32(min);
}
static void tcg_gen_ussub_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
- TCGv_i64 min = tcg_const_i64(0);
+ TCGv_i64 min = tcg_constant_i64(0);
tcg_gen_sub_i64(d, a, b);
tcg_gen_movcond_i64(TCG_COND_LTU, d, a, b, min, d);
- tcg_temp_free_i64(min);
}
void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs,
@@ -2195,16 +2170,14 @@ static void gen_negv_mask(TCGv_i64 d, TCGv_i64 b, TCGv_i64 m)
void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 b)
{
- TCGv_i64 m = tcg_const_i64(dup_const(MO_8, 0x80));
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80));
gen_negv_mask(d, b, m);
- tcg_temp_free_i64(m);
}
void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 b)
{
- TCGv_i64 m = tcg_const_i64(dup_const(MO_16, 0x8000));
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_16, 0x8000));
gen_negv_mask(d, b, m);
- tcg_temp_free_i64(m);
}
void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 b)
@@ -2472,9 +2445,8 @@ void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs,
void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs,
int64_t c, uint32_t oprsz, uint32_t maxsz)
{
- TCGv_i64 tmp = tcg_const_i64(dup_const(vece, c));
+ TCGv_i64 tmp = tcg_constant_i64(dup_const(vece, c));
tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, tmp, &gop_ands);
- tcg_temp_free_i64(tmp);
}
static const GVecGen2s gop_xors = {
@@ -2497,9 +2469,8 @@ void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs,
void tcg_gen_gvec_xori(unsigned vece, uint32_t dofs, uint32_t aofs,
int64_t c, uint32_t oprsz, uint32_t maxsz)
{
- TCGv_i64 tmp = tcg_const_i64(dup_const(vece, c));
+ TCGv_i64 tmp = tcg_constant_i64(dup_const(vece, c));
tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, tmp, &gop_xors);
- tcg_temp_free_i64(tmp);
}
static const GVecGen2s gop_ors = {
@@ -2522,9 +2493,8 @@ void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs,
void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs,
int64_t c, uint32_t oprsz, uint32_t maxsz)
{
- TCGv_i64 tmp = tcg_const_i64(dup_const(vece, c));
+ TCGv_i64 tmp = tcg_constant_i64(dup_const(vece, c));
tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, tmp, &gop_ors);
- tcg_temp_free_i64(tmp);
}
void tcg_gen_vec_shl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c)
@@ -3011,10 +2981,11 @@ void tcg_gen_gvec_rotls(unsigned vece, uint32_t dofs, uint32_t aofs,
static void tcg_gen_shlv_mod_vec(unsigned vece, TCGv_vec d,
TCGv_vec a, TCGv_vec b)
{
- TCGv_vec t = tcg_temp_new_vec_matching(d);
+ TCGType type = tcgv_vec_temp(d)->type;
+ TCGv_vec t = tcg_temp_new_vec(type);
+ TCGv_vec m = tcg_constant_vec(type, vece, (8 << vece) - 1);
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
- tcg_gen_and_vec(vece, t, t, b);
+ tcg_gen_and_vec(vece, t, b, m);
tcg_gen_shlv_vec(vece, d, a, t);
tcg_temp_free_vec(t);
}
@@ -3074,10 +3045,11 @@ void tcg_gen_gvec_shlv(unsigned vece, uint32_t dofs, uint32_t aofs,
static void tcg_gen_shrv_mod_vec(unsigned vece, TCGv_vec d,
TCGv_vec a, TCGv_vec b)
{
- TCGv_vec t = tcg_temp_new_vec_matching(d);
+ TCGType type = tcgv_vec_temp(d)->type;
+ TCGv_vec t = tcg_temp_new_vec(type);
+ TCGv_vec m = tcg_constant_vec(type, vece, (8 << vece) - 1);
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
- tcg_gen_and_vec(vece, t, t, b);
+ tcg_gen_and_vec(vece, t, b, m);
tcg_gen_shrv_vec(vece, d, a, t);
tcg_temp_free_vec(t);
}
@@ -3137,10 +3109,11 @@ void tcg_gen_gvec_shrv(unsigned vece, uint32_t dofs, uint32_t aofs,
static void tcg_gen_sarv_mod_vec(unsigned vece, TCGv_vec d,
TCGv_vec a, TCGv_vec b)
{
- TCGv_vec t = tcg_temp_new_vec_matching(d);
+ TCGType type = tcgv_vec_temp(d)->type;
+ TCGv_vec t = tcg_temp_new_vec(type);
+ TCGv_vec m = tcg_constant_vec(type, vece, (8 << vece) - 1);
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
- tcg_gen_and_vec(vece, t, t, b);
+ tcg_gen_and_vec(vece, t, b, m);
tcg_gen_sarv_vec(vece, d, a, t);
tcg_temp_free_vec(t);
}
@@ -3200,10 +3173,11 @@ void tcg_gen_gvec_sarv(unsigned vece, uint32_t dofs, uint32_t aofs,
static void tcg_gen_rotlv_mod_vec(unsigned vece, TCGv_vec d,
TCGv_vec a, TCGv_vec b)
{
- TCGv_vec t = tcg_temp_new_vec_matching(d);
+ TCGType type = tcgv_vec_temp(d)->type;
+ TCGv_vec t = tcg_temp_new_vec(type);
+ TCGv_vec m = tcg_constant_vec(type, vece, (8 << vece) - 1);
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
- tcg_gen_and_vec(vece, t, t, b);
+ tcg_gen_and_vec(vece, t, b, m);
tcg_gen_rotlv_vec(vece, d, a, t);
tcg_temp_free_vec(t);
}
@@ -3259,10 +3233,11 @@ void tcg_gen_gvec_rotlv(unsigned vece, uint32_t dofs, uint32_t aofs,
static void tcg_gen_rotrv_mod_vec(unsigned vece, TCGv_vec d,
TCGv_vec a, TCGv_vec b)
{
- TCGv_vec t = tcg_temp_new_vec_matching(d);
+ TCGType type = tcgv_vec_temp(d)->type;
+ TCGv_vec t = tcg_temp_new_vec(type);
+ TCGv_vec m = tcg_constant_vec(type, vece, (8 << vece) - 1);
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
- tcg_gen_and_vec(vece, t, t, b);
+ tcg_gen_and_vec(vece, t, b, m);
tcg_gen_rotrv_vec(vece, d, a, t);
tcg_temp_free_vec(t);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v4 07/19] tcg: Use tcg_constant_{i32,i64,vec} with tcg gvec expanders
2020-05-08 18:26 ` [PATCH v4 07/19] tcg: Use tcg_constant_{i32, i64, vec} with tcg gvec expanders Richard Henderson
@ 2020-05-08 19:22 ` Richard Henderson
0 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 19:22 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
On 5/8/20 11:26 AM, Richard Henderson wrote:
> @@ -1647,16 +1632,14 @@ static void gen_addv_mask(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, TCGv_i64 m)
>
> void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
> {
> - TCGv_i64 m = tcg_const_i64(dup_const(MO_8, 0x80));
> + TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80));
> gen_addv_mask(d, a, b, m);
> - tcg_temp_free_i64(m);
> }
>
These unconditional uses of tcg_constant_i64 break 32-bit builds.
I'll have to find another way to handle these.
For now I am dropping this patch.
r~
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v4 08/19] tcg: Use tcg_constant_{i32,i64} with tcg plugins
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (6 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 07/19] tcg: Use tcg_constant_{i32, i64, vec} with tcg gvec expanders Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 09/19] tcg: Rename struct tcg_temp_info to TempOptInfo Richard Henderson
` (10 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/plugin-gen.c | 49 +++++++++++++++++++-----------------------
1 file changed, 22 insertions(+), 27 deletions(-)
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
index 51580d51a0..e5dc9d0ca9 100644
--- a/accel/tcg/plugin-gen.c
+++ b/accel/tcg/plugin-gen.c
@@ -284,8 +284,8 @@ static TCGOp *copy_extu_i32_i64(TCGOp **begin_op, TCGOp *op)
if (TCG_TARGET_REG_BITS == 32) {
/* mov_i32 */
op = copy_op(begin_op, op, INDEX_op_mov_i32);
- /* movi_i32 */
- op = copy_op(begin_op, op, INDEX_op_movi_i32);
+ /* mov_i32 w/ $0 */
+ op = copy_op(begin_op, op, INDEX_op_mov_i32);
} else {
/* extu_i32_i64 */
op = copy_op(begin_op, op, INDEX_op_extu_i32_i64);
@@ -306,39 +306,34 @@ static TCGOp *copy_mov_i64(TCGOp **begin_op, TCGOp *op)
return op;
}
-static TCGOp *copy_movi_i64(TCGOp **begin_op, TCGOp *op, uint64_t v)
-{
- if (TCG_TARGET_REG_BITS == 32) {
- /* 2x movi_i32 */
- op = copy_op(begin_op, op, INDEX_op_movi_i32);
- op->args[1] = v;
-
- op = copy_op(begin_op, op, INDEX_op_movi_i32);
- op->args[1] = v >> 32;
- } else {
- /* movi_i64 */
- op = copy_op(begin_op, op, INDEX_op_movi_i64);
- op->args[1] = v;
- }
- return op;
-}
-
static TCGOp *copy_const_ptr(TCGOp **begin_op, TCGOp *op, void *ptr)
{
if (UINTPTR_MAX == UINT32_MAX) {
- /* movi_i32 */
- op = copy_op(begin_op, op, INDEX_op_movi_i32);
- op->args[1] = (uintptr_t)ptr;
+ /* mov_i32 */
+ op = copy_op(begin_op, op, INDEX_op_mov_i32);
+ op->args[1] = tcgv_i32_arg(tcg_constant_i32((uintptr_t)ptr));
} else {
- /* movi_i64 */
- op = copy_movi_i64(begin_op, op, (uint64_t)(uintptr_t)ptr);
+ /* mov_i64 */
+ op = copy_op(begin_op, op, INDEX_op_mov_i64);
+ op->args[1] = tcgv_i64_arg(tcg_constant_i64((uintptr_t)ptr));
}
return op;
}
static TCGOp *copy_const_i64(TCGOp **begin_op, TCGOp *op, uint64_t v)
{
- return copy_movi_i64(begin_op, op, v);
+ if (TCG_TARGET_REG_BITS == 32) {
+ /* 2x mov_i32 */
+ op = copy_op(begin_op, op, INDEX_op_mov_i32);
+ op->args[1] = tcgv_i32_arg(tcg_constant_i32(v));
+ op = copy_op(begin_op, op, INDEX_op_mov_i32);
+ op->args[1] = tcgv_i32_arg(tcg_constant_i32(v >> 32));
+ } else {
+ /* mov_i64 */
+ op = copy_op(begin_op, op, INDEX_op_mov_i64);
+ op->args[1] = tcgv_i64_arg(tcg_constant_i64(v));
+ }
+ return op;
}
static TCGOp *copy_extu_tl_i64(TCGOp **begin_op, TCGOp *op)
@@ -486,8 +481,8 @@ static TCGOp *append_mem_cb(const struct qemu_plugin_dyn_cb *cb,
tcg_debug_assert(type == PLUGIN_GEN_CB_MEM);
- /* const_i32 == movi_i32 ("info", so it remains as is) */
- op = copy_op(&begin_op, op, INDEX_op_movi_i32);
+ /* const_i32 == mov_i32 ("info", so it remains as is) */
+ op = copy_op(&begin_op, op, INDEX_op_mov_i32);
/* const_ptr */
op = copy_const_ptr(&begin_op, op, cb->userp);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 09/19] tcg: Rename struct tcg_temp_info to TempOptInfo
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (7 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 08/19] tcg: Use tcg_constant_{i32,i64} with tcg plugins Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 10/19] tcg/optimize: Improve find_better_copy Richard Henderson
` (9 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, Philippe Mathieu-Daudé
Fix this name vs our coding style.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/optimize.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 8f3bd99ff4..c0fc5e3da6 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -35,20 +35,20 @@
glue(glue(case INDEX_op_, x), _i64): \
glue(glue(case INDEX_op_, x), _vec)
-struct tcg_temp_info {
+typedef struct TempOptInfo {
bool is_const;
TCGTemp *prev_copy;
TCGTemp *next_copy;
tcg_target_ulong val;
tcg_target_ulong mask;
-};
+} TempOptInfo;
-static inline struct tcg_temp_info *ts_info(TCGTemp *ts)
+static inline TempOptInfo *ts_info(TCGTemp *ts)
{
return ts->state_ptr;
}
-static inline struct tcg_temp_info *arg_info(TCGArg arg)
+static inline TempOptInfo *arg_info(TCGArg arg)
{
return ts_info(arg_temp(arg));
}
@@ -71,9 +71,9 @@ static inline bool ts_is_copy(TCGTemp *ts)
/* Reset TEMP's state, possibly removing the temp for the list of copies. */
static void reset_ts(TCGTemp *ts)
{
- struct tcg_temp_info *ti = ts_info(ts);
- struct tcg_temp_info *pi = ts_info(ti->prev_copy);
- struct tcg_temp_info *ni = ts_info(ti->next_copy);
+ TempOptInfo *ti = ts_info(ts);
+ TempOptInfo *pi = ts_info(ti->prev_copy);
+ TempOptInfo *ni = ts_info(ti->next_copy);
ni->prev_copy = ti->prev_copy;
pi->next_copy = ti->next_copy;
@@ -89,12 +89,12 @@ static void reset_temp(TCGArg arg)
}
/* Initialize and activate a temporary. */
-static void init_ts_info(struct tcg_temp_info *infos,
+static void init_ts_info(TempOptInfo *infos,
TCGTempSet *temps_used, TCGTemp *ts)
{
size_t idx = temp_idx(ts);
if (!test_bit(idx, temps_used->l)) {
- struct tcg_temp_info *ti = &infos[idx];
+ TempOptInfo *ti = &infos[idx];
ts->state_ptr = ti;
ti->next_copy = ts;
@@ -114,7 +114,7 @@ static void init_ts_info(struct tcg_temp_info *infos,
}
}
-static void init_arg_info(struct tcg_temp_info *infos,
+static void init_arg_info(TempOptInfo *infos,
TCGTempSet *temps_used, TCGArg arg)
{
init_ts_info(infos, temps_used, arg_temp(arg));
@@ -180,7 +180,7 @@ static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
const TCGOpDef *def;
TCGOpcode new_op;
tcg_target_ulong mask;
- struct tcg_temp_info *di = arg_info(dst);
+ TempOptInfo *di = arg_info(dst);
def = &tcg_op_defs[op->opc];
if (def->flags & TCG_OPF_VECTOR) {
@@ -211,8 +211,8 @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
TCGTemp *dst_ts = arg_temp(dst);
TCGTemp *src_ts = arg_temp(src);
const TCGOpDef *def;
- struct tcg_temp_info *di;
- struct tcg_temp_info *si;
+ TempOptInfo *di;
+ TempOptInfo *si;
tcg_target_ulong mask;
TCGOpcode new_op;
@@ -245,7 +245,7 @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
di->mask = mask;
if (src_ts->type == dst_ts->type) {
- struct tcg_temp_info *ni = ts_info(si->next_copy);
+ TempOptInfo *ni = ts_info(si->next_copy);
di->next_copy = si->next_copy;
di->prev_copy = src_ts;
@@ -608,7 +608,7 @@ void tcg_optimize(TCGContext *s)
{
int nb_temps, nb_globals;
TCGOp *op, *op_next, *prev_mb = NULL;
- struct tcg_temp_info *infos;
+ TempOptInfo *infos;
TCGTempSet temps_used;
/* Array VALS has an element for each temp.
@@ -619,7 +619,7 @@ void tcg_optimize(TCGContext *s)
nb_temps = s->nb_temps;
nb_globals = s->nb_globals;
bitmap_zero(temps_used.l, nb_temps);
- infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps);
+ infos = tcg_malloc(sizeof(TempOptInfo) * nb_temps);
QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
tcg_target_ulong mask, partmask, affected;
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 10/19] tcg/optimize: Improve find_better_copy
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (8 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 09/19] tcg: Rename struct tcg_temp_info to TempOptInfo Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 11/19] tcg/optimize: Adjust TempOptInfo allocation Richard Henderson
` (8 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Prefer TEMP_CONST over anything else.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/optimize.c | 27 ++++++++++++---------------
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index c0fc5e3da6..b86bf3d707 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -122,31 +122,28 @@ static void init_arg_info(TempOptInfo *infos,
static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
{
- TCGTemp *i;
+ TCGTemp *i, *g, *l;
- /* If this is already a global, we can't do better. */
- if (ts->kind >= TEMP_GLOBAL) {
+ /* If this is already readonly, we can't do better. */
+ if (temp_readonly(ts)) {
return ts;
}
- /* Search for a global first. */
+ g = l = NULL;
for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
- if (i->kind >= TEMP_GLOBAL) {
+ if (temp_readonly(i)) {
return i;
- }
- }
-
- /* If it is a temp, search for a temp local. */
- if (ts->kind == TEMP_NORMAL) {
- for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
- if (i->kind >= TEMP_LOCAL) {
- return i;
+ } else if (i->kind > ts->kind) {
+ if (i->kind == TEMP_GLOBAL) {
+ g = i;
+ } else if (i->kind == TEMP_LOCAL) {
+ l = i;
}
}
}
- /* Failure to find a better representation, return the same temp. */
- return ts;
+ /* If we didn't find a better representation, return the same temp. */
+ return g ? g : l ? l : ts;
}
static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 11/19] tcg/optimize: Adjust TempOptInfo allocation
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (9 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 10/19] tcg/optimize: Improve find_better_copy Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 12/19] tcg/optimize: Use tcg_constant_internal with constant folding Richard Henderson
` (7 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Do not allocate a large block for indexing. Instead, allocate
for each temporary as they are seen.
In general, this will use less memory, if we consider that most
TBs do not touch every target register. This also allows us to
allocate TempOptInfo for new temps created during optimization.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/optimize.c | 60 ++++++++++++++++++++++++++++----------------------
1 file changed, 34 insertions(+), 26 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index b86bf3d707..d36d7e1d7f 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -89,35 +89,41 @@ static void reset_temp(TCGArg arg)
}
/* Initialize and activate a temporary. */
-static void init_ts_info(TempOptInfo *infos,
- TCGTempSet *temps_used, TCGTemp *ts)
+static void init_ts_info(TCGTempSet *temps_used, TCGTemp *ts)
{
size_t idx = temp_idx(ts);
- if (!test_bit(idx, temps_used->l)) {
- TempOptInfo *ti = &infos[idx];
+ TempOptInfo *ti;
+ if (test_bit(idx, temps_used->l)) {
+ return;
+ }
+ set_bit(idx, temps_used->l);
+
+ ti = ts->state_ptr;
+ if (ti == NULL) {
+ ti = tcg_malloc(sizeof(TempOptInfo));
ts->state_ptr = ti;
- ti->next_copy = ts;
- ti->prev_copy = ts;
- if (ts->kind == TEMP_CONST) {
- ti->is_const = true;
- ti->val = ti->mask = ts->val;
- if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
- /* High bits of a 32-bit quantity are garbage. */
- ti->mask |= ~0xffffffffull;
- }
- } else {
- ti->is_const = false;
- ti->mask = -1;
+ }
+
+ ti->next_copy = ts;
+ ti->prev_copy = ts;
+ if (ts->kind == TEMP_CONST) {
+ ti->is_const = true;
+ ti->val = ts->val;
+ ti->mask = ts->val;
+ if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
+ /* High bits of a 32-bit quantity are garbage. */
+ ti->mask |= ~0xffffffffull;
}
- set_bit(idx, temps_used->l);
+ } else {
+ ti->is_const = false;
+ ti->mask = -1;
}
}
-static void init_arg_info(TempOptInfo *infos,
- TCGTempSet *temps_used, TCGArg arg)
+static void init_arg_info(TCGTempSet *temps_used, TCGArg arg)
{
- init_ts_info(infos, temps_used, arg_temp(arg));
+ init_ts_info(temps_used, arg_temp(arg));
}
static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
@@ -603,9 +609,8 @@ static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
/* Propagate constants and copies, fold constant expressions. */
void tcg_optimize(TCGContext *s)
{
- int nb_temps, nb_globals;
+ int nb_temps, nb_globals, i;
TCGOp *op, *op_next, *prev_mb = NULL;
- TempOptInfo *infos;
TCGTempSet temps_used;
/* Array VALS has an element for each temp.
@@ -615,12 +620,15 @@ void tcg_optimize(TCGContext *s)
nb_temps = s->nb_temps;
nb_globals = s->nb_globals;
+
bitmap_zero(temps_used.l, nb_temps);
- infos = tcg_malloc(sizeof(TempOptInfo) * nb_temps);
+ for (i = 0; i < nb_temps; ++i) {
+ s->temps[i].state_ptr = NULL;
+ }
QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
tcg_target_ulong mask, partmask, affected;
- int nb_oargs, nb_iargs, i;
+ int nb_oargs, nb_iargs;
TCGArg tmp;
TCGOpcode opc = op->opc;
const TCGOpDef *def = &tcg_op_defs[opc];
@@ -633,14 +641,14 @@ void tcg_optimize(TCGContext *s)
for (i = 0; i < nb_oargs + nb_iargs; i++) {
TCGTemp *ts = arg_temp(op->args[i]);
if (ts) {
- init_ts_info(infos, &temps_used, ts);
+ init_ts_info(&temps_used, ts);
}
}
} else {
nb_oargs = def->nb_oargs;
nb_iargs = def->nb_iargs;
for (i = 0; i < nb_oargs + nb_iargs; i++) {
- init_arg_info(infos, &temps_used, op->args[i]);
+ init_arg_info(&temps_used, op->args[i]);
}
}
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 12/19] tcg/optimize: Use tcg_constant_internal with constant folding
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (10 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 11/19] tcg/optimize: Adjust TempOptInfo allocation Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 13/19] tcg/tci: Add special tci_movi_{i32,i64} opcodes Richard Henderson
` (6 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/optimize.c | 106 ++++++++++++++++++++++---------------------------
1 file changed, 48 insertions(+), 58 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index d36d7e1d7f..dd5187be31 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -178,37 +178,6 @@ static bool args_are_copies(TCGArg arg1, TCGArg arg2)
return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
}
-static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
-{
- const TCGOpDef *def;
- TCGOpcode new_op;
- tcg_target_ulong mask;
- TempOptInfo *di = arg_info(dst);
-
- def = &tcg_op_defs[op->opc];
- if (def->flags & TCG_OPF_VECTOR) {
- new_op = INDEX_op_dupi_vec;
- } else if (def->flags & TCG_OPF_64BIT) {
- new_op = INDEX_op_movi_i64;
- } else {
- new_op = INDEX_op_movi_i32;
- }
- op->opc = new_op;
- /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
- op->args[0] = dst;
- op->args[1] = val;
-
- reset_temp(dst);
- di->is_const = true;
- di->val = val;
- mask = val;
- if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
- /* High bits of the destination are now garbage. */
- mask |= ~0xffffffffull;
- }
- di->mask = mask;
-}
-
static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
{
TCGTemp *dst_ts = arg_temp(dst);
@@ -259,6 +228,27 @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
}
}
+static void tcg_opt_gen_movi(TCGContext *s, TCGTempSet *temps_used,
+ TCGOp *op, TCGArg dst, TCGArg val)
+{
+ const TCGOpDef *def = &tcg_op_defs[op->opc];
+ TCGType type;
+ TCGTemp *tv;
+
+ if (def->flags & TCG_OPF_VECTOR) {
+ type = TCGOP_VECL(op) + TCG_TYPE_V64;
+ } else if (def->flags & TCG_OPF_64BIT) {
+ type = TCG_TYPE_I64;
+ } else {
+ type = TCG_TYPE_I32;
+ }
+
+ /* Convert movi to mov with constant temp. */
+ tv = tcg_constant_internal(type, val);
+ init_ts_info(temps_used, tv);
+ tcg_opt_gen_mov(s, op, dst, temp_arg(tv));
+}
+
static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
{
uint64_t l64, h64;
@@ -621,7 +611,7 @@ void tcg_optimize(TCGContext *s)
nb_temps = s->nb_temps;
nb_globals = s->nb_globals;
- bitmap_zero(temps_used.l, nb_temps);
+ memset(&temps_used, 0, sizeof(temps_used));
for (i = 0; i < nb_temps; ++i) {
s->temps[i].state_ptr = NULL;
}
@@ -727,7 +717,7 @@ void tcg_optimize(TCGContext *s)
CASE_OP_32_64(rotr):
if (arg_is_const(op->args[1])
&& arg_info(op->args[1])->val == 0) {
- tcg_opt_gen_movi(s, op, op->args[0], 0);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
continue;
}
break;
@@ -1050,7 +1040,7 @@ void tcg_optimize(TCGContext *s)
if (partmask == 0) {
tcg_debug_assert(nb_oargs == 1);
- tcg_opt_gen_movi(s, op, op->args[0], 0);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
continue;
}
if (affected == 0) {
@@ -1067,7 +1057,7 @@ void tcg_optimize(TCGContext *s)
CASE_OP_32_64(mulsh):
if (arg_is_const(op->args[2])
&& arg_info(op->args[2])->val == 0) {
- tcg_opt_gen_movi(s, op, op->args[0], 0);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
continue;
}
break;
@@ -1094,7 +1084,7 @@ void tcg_optimize(TCGContext *s)
CASE_OP_32_64_VEC(sub):
CASE_OP_32_64_VEC(xor):
if (args_are_copies(op->args[1], op->args[2])) {
- tcg_opt_gen_movi(s, op, op->args[0], 0);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
continue;
}
break;
@@ -1111,14 +1101,14 @@ void tcg_optimize(TCGContext *s)
break;
CASE_OP_32_64(movi):
case INDEX_op_dupi_vec:
- tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], op->args[1]);
break;
case INDEX_op_dup_vec:
if (arg_is_const(op->args[1])) {
tmp = arg_info(op->args[1])->val;
tmp = dup_const(TCGOP_VECE(op), tmp);
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
break;
}
goto do_default;
@@ -1141,7 +1131,7 @@ void tcg_optimize(TCGContext *s)
case INDEX_op_extrh_i64_i32:
if (arg_is_const(op->args[1])) {
tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
break;
}
goto do_default;
@@ -1171,7 +1161,7 @@ void tcg_optimize(TCGContext *s)
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
arg_info(op->args[2])->val);
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
break;
}
goto do_default;
@@ -1182,7 +1172,7 @@ void tcg_optimize(TCGContext *s)
TCGArg v = arg_info(op->args[1])->val;
if (v != 0) {
tmp = do_constant_folding(opc, v, 0);
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
} else {
tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
}
@@ -1195,7 +1185,7 @@ void tcg_optimize(TCGContext *s)
tmp = deposit64(arg_info(op->args[1])->val,
op->args[3], op->args[4],
arg_info(op->args[2])->val);
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
break;
}
goto do_default;
@@ -1204,7 +1194,7 @@ void tcg_optimize(TCGContext *s)
if (arg_is_const(op->args[1])) {
tmp = extract64(arg_info(op->args[1])->val,
op->args[2], op->args[3]);
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
break;
}
goto do_default;
@@ -1213,7 +1203,7 @@ void tcg_optimize(TCGContext *s)
if (arg_is_const(op->args[1])) {
tmp = sextract64(arg_info(op->args[1])->val,
op->args[2], op->args[3]);
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
break;
}
goto do_default;
@@ -1229,7 +1219,7 @@ void tcg_optimize(TCGContext *s)
tmp = (int32_t)(((uint32_t)v1 >> op->args[3]) |
((uint32_t)v2 << (32 - op->args[3])));
}
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
break;
}
goto do_default;
@@ -1238,7 +1228,7 @@ void tcg_optimize(TCGContext *s)
tmp = do_constant_folding_cond(opc, op->args[1],
op->args[2], op->args[3]);
if (tmp != 2) {
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
break;
}
goto do_default;
@@ -1248,7 +1238,7 @@ void tcg_optimize(TCGContext *s)
op->args[1], op->args[2]);
if (tmp != 2) {
if (tmp) {
- bitmap_zero(temps_used.l, nb_temps);
+ memset(&temps_used, 0, sizeof(temps_used));
op->opc = INDEX_op_br;
op->args[0] = op->args[3];
} else {
@@ -1293,7 +1283,7 @@ void tcg_optimize(TCGContext *s)
uint64_t a = ((uint64_t)ah << 32) | al;
uint64_t b = ((uint64_t)bh << 32) | bl;
TCGArg rl, rh;
- TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
+ TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
if (opc == INDEX_op_add2_i32) {
a += b;
@@ -1303,8 +1293,8 @@ void tcg_optimize(TCGContext *s)
rl = op->args[0];
rh = op->args[1];
- tcg_opt_gen_movi(s, op, rl, (int32_t)a);
- tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
+ tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)a);
+ tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(a >> 32));
break;
}
goto do_default;
@@ -1315,12 +1305,12 @@ void tcg_optimize(TCGContext *s)
uint32_t b = arg_info(op->args[3])->val;
uint64_t r = (uint64_t)a * b;
TCGArg rl, rh;
- TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
+ TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
rl = op->args[0];
rh = op->args[1];
- tcg_opt_gen_movi(s, op, rl, (int32_t)r);
- tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
+ tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)r);
+ tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(r >> 32));
break;
}
goto do_default;
@@ -1331,7 +1321,7 @@ void tcg_optimize(TCGContext *s)
if (tmp != 2) {
if (tmp) {
do_brcond_true:
- bitmap_zero(temps_used.l, nb_temps);
+ memset(&temps_used, 0, sizeof(temps_used));
op->opc = INDEX_op_br;
op->args[0] = op->args[5];
} else {
@@ -1347,7 +1337,7 @@ void tcg_optimize(TCGContext *s)
/* Simplify LT/GE comparisons vs zero to a single compare
vs the high word of the input. */
do_brcond_high:
- bitmap_zero(temps_used.l, nb_temps);
+ memset(&temps_used, 0, sizeof(temps_used));
op->opc = INDEX_op_brcond_i32;
op->args[0] = op->args[1];
op->args[1] = op->args[3];
@@ -1373,7 +1363,7 @@ void tcg_optimize(TCGContext *s)
goto do_default;
}
do_brcond_low:
- bitmap_zero(temps_used.l, nb_temps);
+ memset(&temps_used, 0, sizeof(temps_used));
op->opc = INDEX_op_brcond_i32;
op->args[1] = op->args[2];
op->args[2] = op->args[4];
@@ -1408,7 +1398,7 @@ void tcg_optimize(TCGContext *s)
op->args[5]);
if (tmp != 2) {
do_setcond_const:
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
} else if ((op->args[5] == TCG_COND_LT
|| op->args[5] == TCG_COND_GE)
&& arg_is_const(op->args[3])
@@ -1493,7 +1483,7 @@ void tcg_optimize(TCGContext *s)
block, otherwise we only trash the output args. "mask" is
the non-zero bits mask for the first output arg. */
if (def->flags & TCG_OPF_BB_END) {
- bitmap_zero(temps_used.l, nb_temps);
+ memset(&temps_used, 0, sizeof(temps_used));
} else {
do_reset_output:
for (i = 0; i < nb_oargs; i++) {
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 13/19] tcg/tci: Add special tci_movi_{i32,i64} opcodes
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (11 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 12/19] tcg/optimize: Use tcg_constant_internal with constant folding Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 14/19] tcg: Remove movi and dupi opcodes Richard Henderson
` (5 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
The normal movi opcodes are going away. We need something
for TCI to use internally.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg-opc.h | 8 ++++++++
tcg/tci.c | 4 ++--
tcg/tci/tcg-target.inc.c | 4 ++--
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h
index e3929b80d2..5a941eaa07 100644
--- a/include/tcg/tcg-opc.h
+++ b/include/tcg/tcg-opc.h
@@ -272,6 +272,14 @@ DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT)
#include "tcg-target.opc.h"
#endif
+#ifdef TCG_TARGET_INTERPRETER
+/* These opcodes are only for use between the tci generator and interpreter. */
+DEF(tci_movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT)
+#if TCG_TARGET_REG_BITS == 64
+DEF(tci_movi_i64, 1, 0, 1, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT)
+#endif
+#endif
+
#undef TLADDR_ARGS
#undef DATA64_ARGS
#undef IMPL
diff --git a/tcg/tci.c b/tcg/tci.c
index 46fe9ce63f..a6c1aaf5af 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -576,7 +576,7 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
t1 = tci_read_r32(regs, &tb_ptr);
tci_write_reg32(regs, t0, t1);
break;
- case INDEX_op_movi_i32:
+ case INDEX_op_tci_movi_i32:
t0 = *tb_ptr++;
t1 = tci_read_i32(&tb_ptr);
tci_write_reg32(regs, t0, t1);
@@ -847,7 +847,7 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
t1 = tci_read_r64(regs, &tb_ptr);
tci_write_reg64(regs, t0, t1);
break;
- case INDEX_op_movi_i64:
+ case INDEX_op_tci_movi_i64:
t0 = *tb_ptr++;
t1 = tci_read_i64(&tb_ptr);
tci_write_reg64(regs, t0, t1);
diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c
index 992d50cb1e..1f1639df0d 100644
--- a/tcg/tci/tcg-target.inc.c
+++ b/tcg/tci/tcg-target.inc.c
@@ -530,13 +530,13 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
uint8_t *old_code_ptr = s->code_ptr;
uint32_t arg32 = arg;
if (type == TCG_TYPE_I32 || arg == arg32) {
- tcg_out_op_t(s, INDEX_op_movi_i32);
+ tcg_out_op_t(s, INDEX_op_tci_movi_i32);
tcg_out_r(s, t0);
tcg_out32(s, arg32);
} else {
tcg_debug_assert(type == TCG_TYPE_I64);
#if TCG_TARGET_REG_BITS == 64
- tcg_out_op_t(s, INDEX_op_movi_i64);
+ tcg_out_op_t(s, INDEX_op_tci_movi_i64);
tcg_out_r(s, t0);
tcg_out64(s, arg);
#else
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 14/19] tcg: Remove movi and dupi opcodes
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (12 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 13/19] tcg/tci: Add special tci_movi_{i32,i64} opcodes Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 15/19] tcg: Use tcg_out_dupi_vec from temp_load Richard Henderson
` (4 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: Aleksandar Markovic, alex.bennee
These are now completely covered by mov from a
TYPE_CONST temporary.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg-opc.h | 3 ---
tcg/aarch64/tcg-target.inc.c | 3 ---
tcg/arm/tcg-target.inc.c | 1 -
tcg/i386/tcg-target.inc.c | 3 ---
tcg/mips/tcg-target.inc.c | 2 --
tcg/optimize.c | 4 ----
tcg/ppc/tcg-target.inc.c | 3 ---
tcg/riscv/tcg-target.inc.c | 2 --
tcg/s390/tcg-target.inc.c | 2 --
tcg/sparc/tcg-target.inc.c | 2 --
tcg/tcg-op-vec.c | 1 -
tcg/tcg.c | 18 +-----------------
tcg/tci/tcg-target.inc.c | 2 --
13 files changed, 1 insertion(+), 45 deletions(-)
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h
index 5a941eaa07..d63c6bcb3d 100644
--- a/include/tcg/tcg-opc.h
+++ b/include/tcg/tcg-opc.h
@@ -45,7 +45,6 @@ DEF(br, 0, 0, 1, TCG_OPF_BB_END)
DEF(mb, 0, 0, 1, 0)
DEF(mov_i32, 1, 1, 0, TCG_OPF_NOT_PRESENT)
-DEF(movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT)
DEF(setcond_i32, 1, 2, 1, 0)
DEF(movcond_i32, 1, 4, 1, IMPL(TCG_TARGET_HAS_movcond_i32))
/* load/store */
@@ -110,7 +109,6 @@ DEF(ctz_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_ctz_i32))
DEF(ctpop_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_ctpop_i32))
DEF(mov_i64, 1, 1, 0, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT)
-DEF(movi_i64, 1, 0, 1, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT)
DEF(setcond_i64, 1, 2, 1, IMPL64)
DEF(movcond_i64, 1, 4, 1, IMPL64 | IMPL(TCG_TARGET_HAS_movcond_i64))
/* load/store */
@@ -215,7 +213,6 @@ DEF(qemu_st_i64, 0, TLADDR_ARGS + DATA64_ARGS, 1,
#define IMPLVEC TCG_OPF_VECTOR | IMPL(TCG_TARGET_MAYBE_vec)
DEF(mov_vec, 1, 1, 0, TCG_OPF_VECTOR | TCG_OPF_NOT_PRESENT)
-DEF(dupi_vec, 1, 0, 1, TCG_OPF_VECTOR | TCG_OPF_NOT_PRESENT)
DEF(dup_vec, 1, 1, 0, IMPLVEC)
DEF(dup2_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_REG_BITS == 32))
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 760b0e742d..d065fd600b 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -2262,8 +2262,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
- case INDEX_op_movi_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
g_assert_not_reached();
@@ -2471,7 +2469,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
- case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */
case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
default:
g_assert_not_reached();
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 6aa7757aac..b967499fa4 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -2068,7 +2068,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
tcg_abort();
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index ae0228238b..bc957e7bed 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -2678,8 +2678,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
- case INDEX_op_movi_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
tcg_abort();
@@ -2965,7 +2963,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
- case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */
case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
default:
g_assert_not_reached();
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index 4d32ebc1df..09dc5a94fa 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -2155,8 +2155,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
- case INDEX_op_movi_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
tcg_abort();
diff --git a/tcg/optimize.c b/tcg/optimize.c
index dd5187be31..9a2c945dbe 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -1099,10 +1099,6 @@ void tcg_optimize(TCGContext *s)
CASE_OP_32_64_VEC(mov):
tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
break;
- CASE_OP_32_64(movi):
- case INDEX_op_dupi_vec:
- tcg_opt_gen_movi(s, &temps_used, op, op->args[0], op->args[1]);
- break;
case INDEX_op_dup_vec:
if (arg_is_const(op->args[1])) {
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index 7da67086c6..c525439b62 100644
--- a/tcg/ppc/tcg-target.inc.c
+++ b/tcg/ppc/tcg-target.inc.c
@@ -2967,8 +2967,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
- case INDEX_op_movi_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
tcg_abort();
@@ -3314,7 +3312,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
return;
case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
- case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */
case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
default:
g_assert_not_reached();
diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c
index 2bc0ba71f2..ec609272ad 100644
--- a/tcg/riscv/tcg-target.inc.c
+++ b/tcg/riscv/tcg-target.inc.c
@@ -1606,8 +1606,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
- case INDEX_op_movi_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
g_assert_not_reached();
diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c
index b07e9ff7d6..f6b003a700 100644
--- a/tcg/s390/tcg-target.inc.c
+++ b/tcg/s390/tcg-target.inc.c
@@ -2310,8 +2310,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
- case INDEX_op_movi_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
tcg_abort();
diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c
index 65fddb310d..0808b79eee 100644
--- a/tcg/sparc/tcg-target.inc.c
+++ b/tcg/sparc/tcg-target.inc.c
@@ -1591,8 +1591,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
- case INDEX_op_movi_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
tcg_abort();
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index 0e3e80a612..4681d26973 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -83,7 +83,6 @@ bool tcg_can_emit_vecop_list(const TCGOpcode *list,
case INDEX_op_xor_vec:
case INDEX_op_mov_vec:
case INDEX_op_dup_vec:
- case INDEX_op_dupi_vec:
case INDEX_op_dup2_vec:
case INDEX_op_ld_vec:
case INDEX_op_st_vec:
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 94f7898317..7a23ccb017 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1463,7 +1463,6 @@ bool tcg_op_supported(TCGOpcode op)
return TCG_TARGET_HAS_goto_ptr;
case INDEX_op_mov_i32:
- case INDEX_op_movi_i32:
case INDEX_op_setcond_i32:
case INDEX_op_brcond_i32:
case INDEX_op_ld8u_i32:
@@ -1557,7 +1556,6 @@ bool tcg_op_supported(TCGOpcode op)
return TCG_TARGET_REG_BITS == 32;
case INDEX_op_mov_i64:
- case INDEX_op_movi_i64:
case INDEX_op_setcond_i64:
case INDEX_op_brcond_i64:
case INDEX_op_ld8u_i64:
@@ -1663,7 +1661,6 @@ bool tcg_op_supported(TCGOpcode op)
case INDEX_op_mov_vec:
case INDEX_op_dup_vec:
- case INDEX_op_dupi_vec:
case INDEX_op_dupm_vec:
case INDEX_op_ld_vec:
case INDEX_op_st_vec:
@@ -3488,7 +3485,7 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
}
/*
- * Specialized code generation for INDEX_op_movi_*.
+ * Specialized code generation for INDEX_op_mov_* with a constant.
*/
static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
tcg_target_ulong val, TCGLifeData arg_life,
@@ -3511,14 +3508,6 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
}
}
-static void tcg_reg_alloc_movi(TCGContext *s, const TCGOp *op)
-{
- TCGTemp *ots = arg_temp(op->args[0]);
- tcg_target_ulong val = op->args[1];
-
- tcg_reg_alloc_do_movi(s, ots, val, op->life, op->output_pref[0]);
-}
-
/*
* Specialized code generation for INDEX_op_mov_*.
*/
@@ -4301,11 +4290,6 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
case INDEX_op_mov_vec:
tcg_reg_alloc_mov(s, op);
break;
- case INDEX_op_movi_i32:
- case INDEX_op_movi_i64:
- case INDEX_op_dupi_vec:
- tcg_reg_alloc_movi(s, op);
- break;
case INDEX_op_dup_vec:
tcg_reg_alloc_dup(s, op);
break;
diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c
index 1f1639df0d..b796f4fc19 100644
--- a/tcg/tci/tcg-target.inc.c
+++ b/tcg/tci/tcg-target.inc.c
@@ -815,8 +815,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
break;
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
- case INDEX_op_movi_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
default:
tcg_abort();
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 15/19] tcg: Use tcg_out_dupi_vec from temp_load
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (13 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 14/19] tcg: Remove movi and dupi opcodes Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 16/19] tcg: Increase tcg_out_dupi_vec immediate to int64_t Richard Henderson
` (3 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Having dupi pass though movi is confusing and arguably wrong.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.inc.c | 7 ----
tcg/i386/tcg-target.inc.c | 63 ++++++++++++++++++++++++------------
tcg/ppc/tcg-target.inc.c | 6 ----
tcg/tcg.c | 8 ++++-
4 files changed, 49 insertions(+), 35 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index d065fd600b..a7b1d36494 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -1010,13 +1010,6 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,
case TCG_TYPE_I64:
tcg_debug_assert(rd < 32);
break;
-
- case TCG_TYPE_V64:
- case TCG_TYPE_V128:
- tcg_debug_assert(rd >= 32);
- tcg_out_dupi_vec(s, type, rd, value);
- return;
-
default:
g_assert_not_reached();
}
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index bc957e7bed..4118071dd9 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -977,30 +977,32 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
}
}
-static void tcg_out_movi(TCGContext *s, TCGType type,
- TCGReg ret, tcg_target_long arg)
+static void tcg_out_movi_vec(TCGContext *s, TCGType type,
+ TCGReg ret, tcg_target_long arg)
+{
+ if (arg == 0) {
+ tcg_out_vex_modrm(s, OPC_PXOR, ret, ret, ret);
+ return;
+ }
+ if (arg == -1) {
+ tcg_out_vex_modrm(s, OPC_PCMPEQB, ret, ret, ret);
+ return;
+ }
+
+ int rexw = (type == TCG_TYPE_I32 ? 0 : P_REXW);
+ tcg_out_vex_modrm_pool(s, OPC_MOVD_VyEy + rexw, ret);
+ if (TCG_TARGET_REG_BITS == 64) {
+ new_pool_label(s, arg, R_386_PC32, s->code_ptr - 4, -4);
+ } else {
+ new_pool_label(s, arg, R_386_32, s->code_ptr - 4, 0);
+ }
+}
+
+static void tcg_out_movi_int(TCGContext *s, TCGType type,
+ TCGReg ret, tcg_target_long arg)
{
tcg_target_long diff;
- switch (type) {
- case TCG_TYPE_I32:
-#if TCG_TARGET_REG_BITS == 64
- case TCG_TYPE_I64:
-#endif
- if (ret < 16) {
- break;
- }
- /* fallthru */
- case TCG_TYPE_V64:
- case TCG_TYPE_V128:
- case TCG_TYPE_V256:
- tcg_debug_assert(ret >= 16);
- tcg_out_dupi_vec(s, type, ret, arg);
- return;
- default:
- g_assert_not_reached();
- }
-
if (arg == 0) {
tgen_arithr(s, ARITH_XOR, ret, ret);
return;
@@ -1029,6 +1031,25 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
tcg_out64(s, arg);
}
+static void tcg_out_movi(TCGContext *s, TCGType type,
+ TCGReg ret, tcg_target_long arg)
+{
+ switch (type) {
+ case TCG_TYPE_I32:
+#if TCG_TARGET_REG_BITS == 64
+ case TCG_TYPE_I64:
+#endif
+ if (ret < 16) {
+ tcg_out_movi_int(s, type, ret, arg);
+ } else {
+ tcg_out_movi_vec(s, type, ret, arg);
+ }
+ break;
+ default:
+ g_assert_not_reached();
+ }
+}
+
static inline void tcg_out_pushi(TCGContext *s, tcg_target_long val)
{
if (val == (int8_t)val) {
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index c525439b62..7111da34dd 100644
--- a/tcg/ppc/tcg-target.inc.c
+++ b/tcg/ppc/tcg-target.inc.c
@@ -987,12 +987,6 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg ret,
tcg_out_movi_int(s, type, ret, arg, false);
break;
- case TCG_TYPE_V64:
- case TCG_TYPE_V128:
- tcg_debug_assert(ret >= TCG_REG_V0);
- tcg_out_dupi_vec(s, type, ret, arg);
- break;
-
default:
g_assert_not_reached();
}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 7a23ccb017..a84a9d3d63 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -3400,7 +3400,13 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
case TEMP_VAL_CONST:
reg = tcg_reg_alloc(s, desired_regs, allocated_regs,
preferred_regs, ts->indirect_base);
- tcg_out_movi(s, ts->type, reg, ts->val);
+ if (ts->type <= TCG_TYPE_I64) {
+ tcg_out_movi(s, ts->type, reg, ts->val);
+ } else if (TCG_TARGET_REG_BITS == 64) {
+ tcg_out_dupi_vec(s, ts->type, reg, ts->val);
+ } else {
+ tcg_out_dupi_vec(s, ts->type, reg, dup_const(MO_32, ts->val));
+ }
ts->mem_coherent = 0;
break;
case TEMP_VAL_MEM:
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 16/19] tcg: Increase tcg_out_dupi_vec immediate to int64_t
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (14 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 15/19] tcg: Use tcg_out_dupi_vec from temp_load Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 17/19] tcg: Add tcg_reg_alloc_dup2 Richard Henderson
` (2 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
While we don't store more than tcg_target_long in TCGTemp,
we shouldn't be limited to that for code generation. We will
be able to use this for INDEX_op_dup2_vec with 2 constants.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.inc.c | 2 +-
tcg/i386/tcg-target.inc.c | 20 ++++++++++++--------
tcg/ppc/tcg-target.inc.c | 15 ++++++++-------
tcg/tcg.c | 4 ++--
4 files changed, 23 insertions(+), 18 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index a7b1d36494..82b409ca7d 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -857,7 +857,7 @@ static void tcg_out_logicali(TCGContext *s, AArch64Insn insn, TCGType ext,
}
static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
- TCGReg rd, tcg_target_long v64)
+ TCGReg rd, int64_t v64)
{
bool q = type == TCG_TYPE_V128;
int cmode, imm8, i;
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 4118071dd9..5e73e5d02b 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -945,7 +945,7 @@ static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
}
static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
- TCGReg ret, tcg_target_long arg)
+ TCGReg ret, int64_t arg)
{
int vex_l = (type == TCG_TYPE_V256 ? P_VEXL : 0);
@@ -958,7 +958,14 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
return;
}
- if (TCG_TARGET_REG_BITS == 64) {
+ if (TCG_TARGET_REG_BITS == 32 && arg == dup_const(MO_32, arg)) {
+ if (have_avx2) {
+ tcg_out_vex_modrm_pool(s, OPC_VPBROADCASTW + vex_l, ret);
+ } else {
+ tcg_out_vex_modrm_pool(s, OPC_VBROADCASTSS, ret);
+ }
+ new_pool_label(s, arg, R_386_32, s->code_ptr - 4, 0);
+ } else {
if (type == TCG_TYPE_V64) {
tcg_out_vex_modrm_pool(s, OPC_MOVQ_VqWq, ret);
} else if (have_avx2) {
@@ -966,14 +973,11 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
} else {
tcg_out_vex_modrm_pool(s, OPC_MOVDDUP, ret);
}
- new_pool_label(s, arg, R_386_PC32, s->code_ptr - 4, -4);
- } else {
- if (have_avx2) {
- tcg_out_vex_modrm_pool(s, OPC_VPBROADCASTW + vex_l, ret);
+ if (TCG_TARGET_REG_BITS == 64) {
+ new_pool_label(s, arg, R_386_PC32, s->code_ptr - 4, -4);
} else {
- tcg_out_vex_modrm_pool(s, OPC_VBROADCASTSS, ret);
+ new_pool_l2(s, R_386_32, s->code_ptr - 4, 0, arg, arg >> 32);
}
- new_pool_label(s, arg, R_386_32, s->code_ptr - 4, 0);
}
}
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index 7111da34dd..3f9690418f 100644
--- a/tcg/ppc/tcg-target.inc.c
+++ b/tcg/ppc/tcg-target.inc.c
@@ -913,7 +913,7 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type, TCGReg ret,
}
static void tcg_out_dupi_vec(TCGContext *s, TCGType type, TCGReg ret,
- tcg_target_long val)
+ int64_t val)
{
uint32_t load_insn;
int rel, low;
@@ -921,20 +921,20 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type, TCGReg ret,
low = (int8_t)val;
if (low >= -16 && low < 16) {
- if (val == (tcg_target_long)dup_const(MO_8, low)) {
+ if (val == dup_const(MO_8, low)) {
tcg_out32(s, VSPLTISB | VRT(ret) | ((val & 31) << 16));
return;
}
- if (val == (tcg_target_long)dup_const(MO_16, low)) {
+ if (val == dup_const(MO_16, low)) {
tcg_out32(s, VSPLTISH | VRT(ret) | ((val & 31) << 16));
return;
}
- if (val == (tcg_target_long)dup_const(MO_32, low)) {
+ if (val == dup_const(MO_32, low)) {
tcg_out32(s, VSPLTISW | VRT(ret) | ((val & 31) << 16));
return;
}
}
- if (have_isa_3_00 && val == (tcg_target_long)dup_const(MO_8, val)) {
+ if (have_isa_3_00 && val == dup_const(MO_8, val)) {
tcg_out32(s, XXSPLTIB | VRT(ret) | ((val & 0xff) << 11));
return;
}
@@ -956,14 +956,15 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type, TCGReg ret,
if (TCG_TARGET_REG_BITS == 64) {
new_pool_label(s, val, rel, s->code_ptr, add);
} else {
- new_pool_l2(s, rel, s->code_ptr, add, val, val);
+ new_pool_l2(s, rel, s->code_ptr, add, val >> 32, val);
}
} else {
load_insn = LVX | VRT(ret) | RB(TCG_REG_TMP1);
if (TCG_TARGET_REG_BITS == 64) {
new_pool_l2(s, rel, s->code_ptr, add, val, val);
} else {
- new_pool_l4(s, rel, s->code_ptr, add, val, val, val, val);
+ new_pool_l4(s, rel, s->code_ptr, add,
+ val >> 32, val, val >> 32, val);
}
}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index a84a9d3d63..18ebcc98f6 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -117,7 +117,7 @@ static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
TCGReg dst, TCGReg base, intptr_t offset);
static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
- TCGReg dst, tcg_target_long arg);
+ TCGReg dst, int64_t arg);
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl,
unsigned vece, const TCGArg *args,
const int *const_args);
@@ -133,7 +133,7 @@ static inline bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
g_assert_not_reached();
}
static inline void tcg_out_dupi_vec(TCGContext *s, TCGType type,
- TCGReg dst, tcg_target_long arg)
+ TCGReg dst, int64_t arg)
{
g_assert_not_reached();
}
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 17/19] tcg: Add tcg_reg_alloc_dup2
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (15 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 16/19] tcg: Increase tcg_out_dupi_vec immediate to int64_t Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 18/19] tcg/i386: Use tcg_constant_vec with tcg vec expanders Richard Henderson
2020-05-08 18:26 ` [PATCH v4 19/19] tcg: Remove tcg_gen_dup{8,16,32,64}i_vec Richard Henderson
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
There are several ways we can expand a vector dup of a 64-bit
element on a 32-bit host.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg.c | 88 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 18ebcc98f6..e8fe2d580b 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -3908,6 +3908,91 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
}
}
+static void tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op)
+{
+ const TCGLifeData arg_life = op->life;
+ TCGTemp *ots, *itsl, *itsh;
+ TCGType vtype = TCGOP_VECL(op) + TCG_TYPE_V64;
+
+ /* This opcode is only valid for 32-bit hosts, for 64-bit elements. */
+ tcg_debug_assert(TCG_TARGET_REG_BITS == 32);
+ tcg_debug_assert(TCGOP_VECE(op) == MO_64);
+
+ ots = arg_temp(op->args[0]);
+ itsl = arg_temp(op->args[1]);
+ itsh = arg_temp(op->args[2]);
+
+ /* ENV should not be modified. */
+ tcg_debug_assert(!temp_readonly(ots));
+
+ /* Allocate the output register now. */
+ if (ots->val_type != TEMP_VAL_REG) {
+ TCGRegSet allocated_regs = s->reserved_regs;
+ TCGRegSet dup_out_regs =
+ tcg_op_defs[INDEX_op_dup_vec].args_ct[0].u.regs;
+
+ /* Make sure to not spill the input registers. */
+ if (!IS_DEAD_ARG(1) && itsl->val_type == TEMP_VAL_REG) {
+ tcg_regset_set_reg(allocated_regs, itsl->reg);
+ }
+ if (!IS_DEAD_ARG(2) && itsh->val_type == TEMP_VAL_REG) {
+ tcg_regset_set_reg(allocated_regs, itsh->reg);
+ }
+
+ ots->reg = tcg_reg_alloc(s, dup_out_regs, allocated_regs,
+ op->output_pref[0], ots->indirect_base);
+ ots->val_type = TEMP_VAL_REG;
+ ots->mem_coherent = 0;
+ s->reg_to_temp[ots->reg] = ots;
+ }
+
+ /* Promote dup2 of immediates to dupi_vec. */
+ if (itsl->val_type == TEMP_VAL_CONST &&
+ itsh->val_type == TEMP_VAL_CONST) {
+ tcg_out_dupi_vec(s, vtype, ots->reg,
+ (uint32_t)itsl->val | ((uint64_t)itsh->val << 32));
+ goto done;
+ }
+
+ /* If the two inputs form one 64-bit value, try dupm_vec. */
+ if (itsl + 1 == itsh &&
+ itsl->base_type == TCG_TYPE_I64 &&
+ itsh->base_type == TCG_TYPE_I64) {
+ if (!itsl->mem_coherent) {
+ temp_sync(s, itsl, s->reserved_regs, 0, 0);
+ }
+ if (!itsl->mem_coherent) {
+ temp_sync(s, itsl, s->reserved_regs, 0, 0);
+ }
+#ifdef HOST_WORDS_BIGENDIAN
+ TCGTemp *its = itsh;
+#else
+ TCGTemp *its = itsl;
+#endif
+ if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg,
+ its->mem_base->reg, its->mem_offset)) {
+ goto done;
+ }
+ }
+
+ /* Fall back to generic expansion. */
+ tcg_reg_alloc_op(s, op);
+ return;
+
+ done:
+ if (IS_DEAD_ARG(1)) {
+ temp_dead(s, itsl);
+ }
+ if (IS_DEAD_ARG(2)) {
+ temp_dead(s, itsh);
+ }
+ if (NEED_SYNC_ARG(0)) {
+ temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0));
+ } else if (IS_DEAD_ARG(0)) {
+ temp_dead(s, ots);
+ }
+}
+
#ifdef TCG_TARGET_STACK_GROWSUP
#define STACK_DIR(x) (-(x))
#else
@@ -4299,6 +4384,9 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
case INDEX_op_dup_vec:
tcg_reg_alloc_dup(s, op);
break;
+ case INDEX_op_dup2_vec:
+ tcg_reg_alloc_dup2(s, op);
+ break;
case INDEX_op_insn_start:
if (num_insns >= 0) {
size_t off = tcg_current_code_size(s);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 18/19] tcg/i386: Use tcg_constant_vec with tcg vec expanders
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (16 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 17/19] tcg: Add tcg_reg_alloc_dup2 Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
2020-05-08 18:26 ` [PATCH v4 19/19] tcg: Remove tcg_gen_dup{8,16,32,64}i_vec Richard Henderson
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.inc.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 5e73e5d02b..cce28c81d7 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -3519,7 +3519,7 @@ static void expand_vec_rotv(TCGType type, unsigned vece, TCGv_vec v0,
static void expand_vec_mul(TCGType type, unsigned vece,
TCGv_vec v0, TCGv_vec v1, TCGv_vec v2)
{
- TCGv_vec t1, t2, t3, t4;
+ TCGv_vec t1, t2, t3, t4, zero;
tcg_debug_assert(vece == MO_8);
@@ -3537,11 +3537,11 @@ static void expand_vec_mul(TCGType type, unsigned vece,
case TCG_TYPE_V64:
t1 = tcg_temp_new_vec(TCG_TYPE_V128);
t2 = tcg_temp_new_vec(TCG_TYPE_V128);
- tcg_gen_dup16i_vec(t2, 0);
+ zero = tcg_constant_vec(TCG_TYPE_V128, MO_8, 0);
vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t2));
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t2), tcgv_vec_arg(t2), tcgv_vec_arg(v2));
+ tcgv_vec_arg(t2), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
tcg_gen_mul_vec(MO_16, t1, t1, t2);
tcg_gen_shri_vec(MO_16, t1, t1, 8);
vec_gen_3(INDEX_op_x86_packus_vec, TCG_TYPE_V128, MO_8,
@@ -3556,15 +3556,15 @@ static void expand_vec_mul(TCGType type, unsigned vece,
t2 = tcg_temp_new_vec(type);
t3 = tcg_temp_new_vec(type);
t4 = tcg_temp_new_vec(type);
- tcg_gen_dup16i_vec(t4, 0);
+ zero = tcg_constant_vec(TCG_TYPE_V128, MO_8, 0);
vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
- tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t4));
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
- tcgv_vec_arg(t2), tcgv_vec_arg(t4), tcgv_vec_arg(v2));
+ tcgv_vec_arg(t2), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
- tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(t4));
+ tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
- tcgv_vec_arg(t4), tcgv_vec_arg(t4), tcgv_vec_arg(v2));
+ tcgv_vec_arg(t4), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
tcg_gen_mul_vec(MO_16, t1, t1, t2);
tcg_gen_mul_vec(MO_16, t3, t3, t4);
tcg_gen_shri_vec(MO_16, t1, t1, 8);
@@ -3592,7 +3592,7 @@ static bool expand_vec_cmp_noinv(TCGType type, unsigned vece, TCGv_vec v0,
NEED_UMIN = 8,
NEED_UMAX = 16,
};
- TCGv_vec t1, t2;
+ TCGv_vec t1, t2, t3;
uint8_t fixup;
switch (cond) {
@@ -3663,9 +3663,9 @@ static bool expand_vec_cmp_noinv(TCGType type, unsigned vece, TCGv_vec v0,
} else if (fixup & NEED_BIAS) {
t1 = tcg_temp_new_vec(type);
t2 = tcg_temp_new_vec(type);
- tcg_gen_dupi_vec(vece, t2, 1ull << ((8 << vece) - 1));
- tcg_gen_sub_vec(vece, t1, v1, t2);
- tcg_gen_sub_vec(vece, t2, v2, t2);
+ t3 = tcg_constant_vec(type, vece, 1ull << ((8 << vece) - 1));
+ tcg_gen_sub_vec(vece, t1, v1, t3);
+ tcg_gen_sub_vec(vece, t2, v2, t3);
v1 = t1;
v2 = t2;
cond = tcg_signed_cond(cond);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4 19/19] tcg: Remove tcg_gen_dup{8,16,32,64}i_vec
2020-05-08 18:25 [PATCH v4 00/19] tcg: Better handling of constants Richard Henderson
` (17 preceding siblings ...)
2020-05-08 18:26 ` [PATCH v4 18/19] tcg/i386: Use tcg_constant_vec with tcg vec expanders Richard Henderson
@ 2020-05-08 18:26 ` Richard Henderson
18 siblings, 0 replies; 22+ messages in thread
From: Richard Henderson @ 2020-05-08 18:26 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
These interfaces have been replaced by tcg_gen_dupi_vec
and tcg_constant_vec.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg-op.h | 4 ----
tcg/tcg-op-vec.c | 20 --------------------
2 files changed, 24 deletions(-)
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index b4fba35e87..d0319692ec 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -959,10 +959,6 @@ void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
void tcg_gen_dup_mem_vec(unsigned vece, TCGv_vec, TCGv_ptr, tcg_target_long);
-void tcg_gen_dup8i_vec(TCGv_vec, uint32_t);
-void tcg_gen_dup16i_vec(TCGv_vec, uint32_t);
-void tcg_gen_dup32i_vec(TCGv_vec, uint32_t);
-void tcg_gen_dup64i_vec(TCGv_vec, uint64_t);
void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index 4681d26973..9c5deafd5f 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -284,26 +284,6 @@ void tcg_gen_dupi_vec(unsigned vece, TCGv_vec dest, uint64_t val)
tcg_gen_mov_vec(dest, tcg_constant_vec(type, vece, val));
}
-void tcg_gen_dup64i_vec(TCGv_vec dest, uint64_t val)
-{
- tcg_gen_dupi_vec(MO_64, dest, val);
-}
-
-void tcg_gen_dup32i_vec(TCGv_vec dest, uint32_t val)
-{
- tcg_gen_dupi_vec(MO_32, dest, val);
-}
-
-void tcg_gen_dup16i_vec(TCGv_vec dest, uint32_t val)
-{
- tcg_gen_dupi_vec(MO_16, dest, val);
-}
-
-void tcg_gen_dup8i_vec(TCGv_vec dest, uint32_t val)
-{
- tcg_gen_dupi_vec(MO_8, dest, val);
-}
-
void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec r, TCGv_i64 a)
{
TCGArg ri = tcgv_vec_arg(r);
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread