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[88.21.202.17]) by smtp.gmail.com with ESMTPSA id d15sm921152ejr.50.2020.05.10.14.01.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 May 2020 14:01:31 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 00/12] hw/mips/fuloong2e: PoC to fix hang after reboot Date: Sun, 10 May 2020 23:01:16 +0200 Message-Id: <20200510210128.18343-1-f4bug@amsat.org> X-Mailer: git-send-email 2.21.3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-x533.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Huacai Chen , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aleksandar Markovic , Paolo Bonzini , Huacai Chen , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The PMON firmware behave differently regarding it is run after a cold/warm reset. A simple bit flip fix the issue, however we need to know the type of reset to set it. Currently QEMU only supports COLD reset. This series contains various of my current Fuloong queue, - Welcome Huacai Chen as co-maintainer, - Fix typo in machine name, - Few cleanups in Bonito64, - Report various Bonito64 accesses as UNIMP, - Proof-of-concept fix for the reset bit. The last patch is not for merging, but is included to see if the Multi-phase reset mechanism can fix the problem. Regards, Phil. Huacai Chen (1): MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé (11): hw/mips/fuloong2e: Rename PMON BIOS name hw/mips/fuloong2e: Move code and update a comment hw/mips/fuloong2e: Fix typo in Fuloong machine name hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge hw/pci-host/bonito: Fix DPRINTF() format strings hw/pci-host/bonito: Map peripheral using physical address hw/pci-host/bonito: Map all the Bonito64 I/O range hw/pci-host/bonito: Map the different PCI ranges more detailled hw/pci-host/bonito: Better describe the I/O CS regions hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32 POC hw/pci-host/bonito: Fix BONGENCFG value after a warm-reset docs/system/target-mips.rst | 2 +- default-configs/mips64el-softmmu.mak | 2 +- hw/isa/vt82c686.c | 2 +- hw/mips/{mips_fulong2e.c => fuloong2e.c} | 41 +++++------ hw/pci-host/bonito.c | 92 +++++++++++++++++++----- tests/qtest/endianness-test.c | 2 +- MAINTAINERS | 6 +- hw/mips/Kconfig | 3 +- hw/mips/Makefile.objs | 2 +- hw/pci-host/Kconfig | 5 ++ hw/pci-host/Makefile.objs | 2 +- 11 files changed, 114 insertions(+), 45 deletions(-) rename hw/mips/{mips_fulong2e.c => fuloong2e.c} (91%) -- 2.21.3