[PATCH 1/1] NetBSD/arm build fix

[PATCH 1/1] NetBSD/arm build fix

[Nick Hudson]

Fix building on NetBSD/arm by extracting the FSR value from the
correct siginfo_t field.

Signed-off-by: Nick Hudson <skrll@netbsd.org>
---
 accel/tcg/user-exec.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 52359949df..3637626456 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -517,6 +517,7 @@ int cpu_signal_handler(int host_signum, void *pinfo,
 
 #if defined(__NetBSD__)
 #include <ucontext.h>
+#include <sys/siginfo.h>
 #endif
 
 int cpu_signal_handler(int host_signum, void *pinfo,
@@ -525,6 +526,7 @@ int cpu_signal_handler(int host_signum, void *pinfo,
     siginfo_t *info = pinfo;
 #if defined(__NetBSD__)
     ucontext_t *uc = puc;
+    siginfo_t *si = pinfo;
 #else
     ucontext_t *uc = puc;
 #endif
@@ -539,10 +541,18 @@ int cpu_signal_handler(int host_signum, void *pinfo,
     pc = uc->uc_mcontext.arm_pc;
 #endif
 
+#if defined(__NetBSD__)
+    /* siginfo_t::si_trap is the FSR value, in which bit 11 is WnR
+     * (assuming a v6 or later processor; on v5 we will always report
+     * this as a read).
+     */
+    is_write = extract32(si->si_trap, 11, 1);
+#else
     /* error_code is the FSR value, in which bit 11 is WnR (assuming a v6 or
      * later processor; on v5 we will always report this as a read).
      */
     is_write = extract32(uc->uc_mcontext.error_code, 11, 1);
+#endif
     return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask);
 }
 
-- 
2.17.1

Re: [PATCH 1/1] NetBSD/arm build fix

[Richard Henderson]

On 5/11/20 11:48 PM, Nick Hudson wrote:
>  
> +#if defined(__NetBSD__)
> +    /* siginfo_t::si_trap is the FSR value, in which bit 11 is WnR
> +     * (assuming a v6 or later processor; on v5 we will always report
> +     * this as a read).
> +     */
> +    is_write = extract32(si->si_trap, 11, 1);
> +#else
>      /* error_code is the FSR value, in which bit 11 is WnR (assuming a v6 or
>       * later processor; on v5 we will always report this as a read).
>       */
>      is_write = extract32(uc->uc_mcontext.error_code, 11, 1);
> +#endif

While this works, I think it might be a bit clearer as


    uint32_t fsr;

#ifdef __NetBSD__
    fsr = si->si_trap;
#else
    fsr = uc->uc_mcontext.error_code;
#endif
    /*
     * In the FSR, bit 11 is WnR, assuming a v6 or
     * later processor.  On v5 we will always report
     * this as a read, which will fail later.
     */
    is_write = extract32(fsr, 11, 1);


r~