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* [PATCH v2 0/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask()
@ 2020-05-18 17:38 Philippe Mathieu-Daudé
  2020-05-18 17:38 ` [PATCH v2 1/2] hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit Philippe Mathieu-Daudé
  2020-05-18 17:38 ` [PATCH v2 2/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
  0 siblings, 2 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-18 17:38 UTC (permalink / raw)
  To: qemu-devel; +Cc: Thomas Huth, Jason Wang, Philippe Mathieu-Daudé

Since v1: Addressed Thomas review comments:
- return instead of break + call update()
- fixed format strings
- add more LOG_UNIMP

Supersedes: <20200518094904.24226-1-f4bug@amsat.org>

Philippe Mathieu-Daudé (2):
  hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit
  hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask()

 hw/m68k/mcf5206.c  | 14 +++++++++-----
 hw/m68k/mcf5208.c  | 16 ++++++++++------
 hw/m68k/mcf_intc.c | 10 +++++++---
 hw/net/mcf_fec.c   |  9 ++++++---
 4 files changed, 32 insertions(+), 17 deletions(-)

-- 
2.21.3



^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH v2 1/2] hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit
  2020-05-18 17:38 [PATCH v2 0/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
@ 2020-05-18 17:38 ` Philippe Mathieu-Daudé
  2020-05-21 17:13   ` Thomas Huth
  2020-05-18 17:38 ` [PATCH v2 2/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
  1 sibling, 1 reply; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-18 17:38 UTC (permalink / raw)
  To: qemu-devel
  Cc: Thomas Huth, Jason Wang, Philippe Mathieu-Daudé, Thomas Huth

All calls to m5206_mbar_read/m5206_mbar_write are used with
'offset = hwaddr & 0x3ff', so we are sure the offset fits
in 16-bit.

Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/m68k/mcf5206.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index b155dd8170..45f44c43f0 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -273,7 +273,7 @@ static void m5206_mbar_reset(m5206_mbar_state *s)
 }
 
 static uint64_t m5206_mbar_read(m5206_mbar_state *s,
-                                uint64_t offset, unsigned size)
+                                uint16_t offset, unsigned size)
 {
     if (offset >= 0x100 && offset < 0x120) {
         return m5206_timer_read(s->timer[0], offset - 0x100);
@@ -306,11 +306,11 @@ static uint64_t m5206_mbar_read(m5206_mbar_state *s,
     case 0x170: return s->uivr[0];
     case 0x1b0: return s->uivr[1];
     }
-    hw_error("Bad MBAR read offset 0x%x", (int)offset);
+    hw_error("Bad MBAR read offset 0x%x", offset);
     return 0;
 }
 
-static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
+static void m5206_mbar_write(m5206_mbar_state *s, uint16_t offset,
                              uint64_t value, unsigned size)
 {
     if (offset >= 0x100 && offset < 0x120) {
@@ -360,7 +360,7 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
         s->uivr[1] = value;
         break;
     default:
-        hw_error("Bad MBAR write offset 0x%x", (int)offset);
+        hw_error("Bad MBAR write offset 0x%x", offset);
         break;
     }
 }
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v2 2/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask()
  2020-05-18 17:38 [PATCH v2 0/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
  2020-05-18 17:38 ` [PATCH v2 1/2] hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit Philippe Mathieu-Daudé
@ 2020-05-18 17:38 ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-18 17:38 UTC (permalink / raw)
  To: qemu-devel; +Cc: Thomas Huth, Jason Wang, Philippe Mathieu-Daudé

hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.

When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/m68k/mcf5206.c  | 10 +++++++---
 hw/m68k/mcf5208.c  | 16 ++++++++++------
 hw/m68k/mcf_intc.c | 10 +++++++---
 hw/net/mcf_fec.c   |  9 ++++++---
 4 files changed, 30 insertions(+), 15 deletions(-)

diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index 45f44c43f0..eebd16bb7a 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -8,6 +8,7 @@
 
 #include "qemu/osdep.h"
 #include "qemu/error-report.h"
+#include "qemu/log.h"
 #include "cpu.h"
 #include "hw/hw.h"
 #include "hw/irq.h"
@@ -225,7 +226,8 @@ static void m5206_mbar_update(m5206_mbar_state *s)
                 break;
             default:
                 /* Unknown vector.  */
-                error_report("Unhandled vector for IRQ %d", irq);
+                qemu_log_mask(LOG_UNIMP, "%s: Unhandled vector for IRQ %d\n",
+                              __func__, irq);
                 vector = 0xf;
                 break;
             }
@@ -306,7 +308,8 @@ static uint64_t m5206_mbar_read(m5206_mbar_state *s,
     case 0x170: return s->uivr[0];
     case 0x1b0: return s->uivr[1];
     }
-    hw_error("Bad MBAR read offset 0x%x", offset);
+    qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad MBAR offset 0x%x\n",
+                  __func__, offset);
     return 0;
 }
 
@@ -360,7 +363,8 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint16_t offset,
         s->uivr[1] = value;
         break;
     default:
-        hw_error("Bad MBAR write offset 0x%x", offset);
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad MBAR offset 0x%x\n",
+                      __func__, offset);
         break;
     }
 }
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index b84c152ce3..108623b4ad 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -9,10 +9,10 @@
 #include "qemu/osdep.h"
 #include "qemu/units.h"
 #include "qemu/error-report.h"
+#include "qemu/log.h"
 #include "qapi/error.h"
 #include "qemu-common.h"
 #include "cpu.h"
-#include "hw/hw.h"
 #include "hw/irq.h"
 #include "hw/m68k/mcf.h"
 #include "hw/m68k/mcf_fec.h"
@@ -111,8 +111,9 @@ static void m5208_timer_write(void *opaque, hwaddr offset,
     case 4:
         break;
     default:
-        hw_error("m5208_timer_write: Bad offset 0x%x\n", (int)offset);
-        break;
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" PRIx64 "\n",
+                      __func__, offset);
+        return;
     }
     m5208_timer_update(s);
 }
@@ -136,7 +137,8 @@ static uint64_t m5208_timer_read(void *opaque, hwaddr addr,
     case 4:
         return ptimer_get_count(s->timer);
     default:
-        hw_error("m5208_timer_read: Bad offset 0x%x\n", (int)addr);
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+                      __func__, addr);
         return 0;
     }
 }
@@ -164,7 +166,8 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
         return 0;
 
     default:
-        hw_error("m5208_sys_read: Bad offset 0x%x\n", (int)addr);
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+                      __func__, addr);
         return 0;
     }
 }
@@ -172,7 +175,8 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
 static void m5208_sys_write(void *opaque, hwaddr addr,
                             uint64_t value, unsigned size)
 {
-    hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
+    qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+                  __func__, addr);
 }
 
 static const MemoryRegionOps m5208_sys_ops = {
diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c
index d9e03a06ab..bc20742d9a 100644
--- a/hw/m68k/mcf_intc.c
+++ b/hw/m68k/mcf_intc.c
@@ -8,6 +8,7 @@
 
 #include "qemu/osdep.h"
 #include "qemu/module.h"
+#include "qemu/log.h"
 #include "cpu.h"
 #include "hw/hw.h"
 #include "hw/irq.h"
@@ -80,7 +81,9 @@ static uint64_t mcf_intc_read(void *opaque, hwaddr addr,
     case 0xe1: case 0xe2: case 0xe3: case 0xe4:
     case 0xe5: case 0xe6: case 0xe7:
         /* LnIACK */
-        hw_error("mcf_intc_read: LnIACK not implemented\n");
+        qemu_log_mask(LOG_UNIMP, "%s: LnIACK not implemented (offset 0x%02x)\n",
+                      __func__, offset);
+        /* fallthru */
     default:
         return 0;
     }
@@ -127,8 +130,9 @@ static void mcf_intc_write(void *opaque, hwaddr addr,
         }
         break;
     default:
-        hw_error("mcf_intc_write: Bad write offset %d\n", offset);
-        break;
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%02x\n",
+                      __func__, offset);
+        return;
     }
     mcf_intc_update(s);
 }
diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c
index 9327ac8a30..281345862c 100644
--- a/hw/net/mcf_fec.c
+++ b/hw/net/mcf_fec.c
@@ -7,7 +7,7 @@
  */
 
 #include "qemu/osdep.h"
-#include "hw/hw.h"
+#include "qemu/log.h"
 #include "hw/irq.h"
 #include "net/net.h"
 #include "qemu/module.h"
@@ -392,7 +392,8 @@ static uint64_t mcf_fec_read(void *opaque, hwaddr addr,
     case 0x188: return s->emrbr;
     case 0x200 ... 0x2e0: return s->mib[(addr & 0x1ff) / 4];
     default:
-        hw_error("mcf_fec_read: Bad address 0x%x\n", (int)addr);
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%" HWADDR_PRIX "\n",
+                      __func__, addr);
         return 0;
     }
 }
@@ -492,7 +493,9 @@ static void mcf_fec_write(void *opaque, hwaddr addr,
         s->mib[(addr & 0x1ff) / 4] = value;
         break;
     default:
-        hw_error("mcf_fec_write Bad address 0x%x\n", (int)addr);
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%" HWADDR_PRIX "\n",
+                      __func__, addr);
+        return;
     }
     mcf_fec_update(s);
 }
-- 
2.21.3



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v2 1/2] hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit
  2020-05-18 17:38 ` [PATCH v2 1/2] hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit Philippe Mathieu-Daudé
@ 2020-05-21 17:13   ` Thomas Huth
  0 siblings, 0 replies; 4+ messages in thread
From: Thomas Huth @ 2020-05-21 17:13 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé; +Cc: Jason Wang, qemu-devel

Am Mon, 18 May 2020 19:38:58 +0200
schrieb Philippe Mathieu-Daudé <f4bug@amsat.org>:

> All calls to m5206_mbar_read/m5206_mbar_write are used with
> 'offset = hwaddr & 0x3ff', so we are sure the offset fits
> in 16-bit.
> 
> Suggested-by: Thomas Huth <thuth@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/m68k/mcf5206.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
> index b155dd8170..45f44c43f0 100644
> --- a/hw/m68k/mcf5206.c
> +++ b/hw/m68k/mcf5206.c
> @@ -273,7 +273,7 @@ static void m5206_mbar_reset(m5206_mbar_state *s)
>  }
>  
>  static uint64_t m5206_mbar_read(m5206_mbar_state *s,
> -                                uint64_t offset, unsigned size)
> +                                uint16_t offset, unsigned size)
>  {
>      if (offset >= 0x100 && offset < 0x120) {
>          return m5206_timer_read(s->timer[0], offset - 0x100);
> @@ -306,11 +306,11 @@ static uint64_t
> m5206_mbar_read(m5206_mbar_state *s, case 0x170: return s->uivr[0];
>      case 0x1b0: return s->uivr[1];
>      }
> -    hw_error("Bad MBAR read offset 0x%x", (int)offset);
> +    hw_error("Bad MBAR read offset 0x%x", offset);
>      return 0;
>  }
>  
> -static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
> +static void m5206_mbar_write(m5206_mbar_state *s, uint16_t offset,
>                               uint64_t value, unsigned size)
>  {
>      if (offset >= 0x100 && offset < 0x120) {
> @@ -360,7 +360,7 @@ static void m5206_mbar_write(m5206_mbar_state *s,
> uint32_t offset, s->uivr[1] = value;
>          break;
>      default:
> -        hw_error("Bad MBAR write offset 0x%x", (int)offset);
> +        hw_error("Bad MBAR write offset 0x%x", offset);

Isn't the correct format string for short ints (i.e. 16-bit) rather %hx
instead of %x ? ... I think it does not matter on x86, but IIRC there
are other architectures where this could be a problem. I'd say, let's
simply use "int" for offset instead, that's likely the best solution.
(I can do the change when picking up the patch in case you don't want
to respin, just let me know)

 Thomas


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-05-21 17:23 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2020-05-18 17:38 [PATCH v2 0/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
2020-05-18 17:38 ` [PATCH v2 1/2] hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit Philippe Mathieu-Daudé
2020-05-21 17:13   ` Thomas Huth
2020-05-18 17:38 ` [PATCH v2 2/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé

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