diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index a31134b65c..faa48493f6 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -321,6 +321,8 @@ void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
 hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int mb_sp_gdb_get_reg(CPUMBState *env, GByteArray *buf, int n);
+int mb_sp_gdb_set_reg(CPUMBState *env, uint8_t *buf, int n);
 
 void mb_tcg_init(void);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index faa88e5865..c87257d928 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -28,6 +28,7 @@
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
 #include "exec/exec-all.h"
+#include "exec/gdbstub.h"
 #include "fpu/softfloat-helpers.h"
 
 static const struct {
@@ -226,6 +227,9 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
     env->pvr.regs[11] = (cpu->cfg.use_mmu ? PVR11_USE_MMU : 0) |
                         16 << 17;
 
+    gdb_register_coprocessor(cs, mb_sp_gdb_get_reg, mb_sp_gdb_set_reg,
+                             2, "microblaze-stack-protect.xml", 32 + 25);
+
     mcc->parent_realize(dev, errp);
 }
 
@@ -329,7 +333,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
 #endif
     dc->vmsd = &vmstate_mb_cpu;
     device_class_set_props(dc, mb_properties);
-    cc->gdb_num_core_regs = 32 + 27;
+    cc->gdb_num_core_regs = 32 + 25;
     cc->gdb_core_xml_file = "microblaze-core.xml";
 
     cc->disas_set_info = mb_disas_set_info;
diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c
index 73e8973597..6eeccb9201 100644
--- a/target/microblaze/gdbstub.c
+++ b/target/microblaze/gdbstub.c
@@ -65,10 +65,12 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
         /* Other SRegs aren't modeled, so report a value of 0 */
         case 19 ... 24:
             return gdb_get_reg32(mem_buf, 0);
+#if 0
         case 25:
             return gdb_get_reg32(mem_buf, env->slr);
         case 26:
             return gdb_get_reg32(mem_buf, env->shr);
+#endif
         default:
             return 0;
         }
@@ -129,13 +131,47 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
         case 18:
             env->sregs[SR_EDR] = tmp;
             break;
+#if 0
         case 25:
             env->slr = tmp;
             break;
         case 26:
             env->shr = tmp;
             break;
+#endif
         }
     }
     return 4;
 }
+
+int mb_sp_gdb_get_reg(CPUMBState *env, GByteArray *buf, int n)
+{
+    printf("%s: n=%d\n", __func__, n);
+    switch (n) {
+    case 0:
+        return gdb_get_reg32(buf, env->slr);
+    case 1:
+        return gdb_get_reg32(buf, env->shr);
+    default:
+        return 0;
+    }
+    return 0;
+}
+
+int mb_sp_gdb_set_reg(CPUMBState *env, uint8_t *buf, int n)
+{
+    uint32_t tmp;
+
+    tmp = ldl_p(buf);
+
+    printf("%s: n=%d\n", __func__, n);
+    switch (n) {
+    case 25:
+        env->slr = tmp;
+        break;
+    case 26:
+        env->shr = tmp;
+        break;
+    }
+    return 4;
+}