* [PULL 1/2] hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit
2020-05-30 7:53 [PULL 0/2] m68k coldfire machine cleanup patches Thomas Huth
@ 2020-05-30 7:53 ` Thomas Huth
2020-05-30 7:53 ` [PULL 2/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask() Thomas Huth
2020-05-31 20:48 ` [PULL 0/2] m68k coldfire machine cleanup patches Peter Maydell
2 siblings, 0 replies; 4+ messages in thread
From: Thomas Huth @ 2020-05-30 7:53 UTC (permalink / raw)
To: qemu-devel, Peter Maydell; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
All calls to m5206_mbar_read/m5206_mbar_write are used with
'offset = hwaddr & 0x3ff', so we are sure the offset fits
in 16-bit.
Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200526094052.1723-2-f4bug@amsat.org>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/mcf5206.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index b155dd8170..187291e1f6 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -273,7 +273,7 @@ static void m5206_mbar_reset(m5206_mbar_state *s)
}
static uint64_t m5206_mbar_read(m5206_mbar_state *s,
- uint64_t offset, unsigned size)
+ uint16_t offset, unsigned size)
{
if (offset >= 0x100 && offset < 0x120) {
return m5206_timer_read(s->timer[0], offset - 0x100);
@@ -306,11 +306,11 @@ static uint64_t m5206_mbar_read(m5206_mbar_state *s,
case 0x170: return s->uivr[0];
case 0x1b0: return s->uivr[1];
}
- hw_error("Bad MBAR read offset 0x%x", (int)offset);
+ hw_error("Bad MBAR read offset 0x%"PRIx16, offset);
return 0;
}
-static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
+static void m5206_mbar_write(m5206_mbar_state *s, uint16_t offset,
uint64_t value, unsigned size)
{
if (offset >= 0x100 && offset < 0x120) {
@@ -360,7 +360,7 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
s->uivr[1] = value;
break;
default:
- hw_error("Bad MBAR write offset 0x%x", (int)offset);
+ hw_error("Bad MBAR write offset 0x%"PRIx16, offset);
break;
}
}
--
2.26.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PULL 2/2] hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask()
2020-05-30 7:53 [PULL 0/2] m68k coldfire machine cleanup patches Thomas Huth
2020-05-30 7:53 ` [PULL 1/2] hw/m68k/mcf5206: Reduce m5206_mbar_read/write() offset arg to 16-bit Thomas Huth
@ 2020-05-30 7:53 ` Thomas Huth
2020-05-31 20:48 ` [PULL 0/2] m68k coldfire machine cleanup patches Peter Maydell
2 siblings, 0 replies; 4+ messages in thread
From: Thomas Huth @ 2020-05-30 7:53 UTC (permalink / raw)
To: qemu-devel, Peter Maydell; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200526094052.1723-3-f4bug@amsat.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/mcf5206.c | 10 +++++++---
hw/m68k/mcf5208.c | 16 ++++++++++------
hw/m68k/mcf_intc.c | 10 +++++++---
hw/net/mcf_fec.c | 9 ++++++---
4 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index 187291e1f6..a2fef04f8e 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
+#include "qemu/log.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/irq.h"
@@ -225,7 +226,8 @@ static void m5206_mbar_update(m5206_mbar_state *s)
break;
default:
/* Unknown vector. */
- error_report("Unhandled vector for IRQ %d", irq);
+ qemu_log_mask(LOG_UNIMP, "%s: Unhandled vector for IRQ %d\n",
+ __func__, irq);
vector = 0xf;
break;
}
@@ -306,7 +308,8 @@ static uint64_t m5206_mbar_read(m5206_mbar_state *s,
case 0x170: return s->uivr[0];
case 0x1b0: return s->uivr[1];
}
- hw_error("Bad MBAR read offset 0x%"PRIx16, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad MBAR offset 0x%"PRIx16"\n",
+ __func__, offset);
return 0;
}
@@ -360,7 +363,8 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint16_t offset,
s->uivr[1] = value;
break;
default:
- hw_error("Bad MBAR write offset 0x%"PRIx16, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad MBAR offset 0x%"PRIx16"\n",
+ __func__, offset);
break;
}
}
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index b84c152ce3..2ab9701ad6 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -9,10 +9,10 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qemu/error-report.h"
+#include "qemu/log.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
-#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/m68k/mcf.h"
#include "hw/m68k/mcf_fec.h"
@@ -111,8 +111,9 @@ static void m5208_timer_write(void *opaque, hwaddr offset,
case 4:
break;
default:
- hw_error("m5208_timer_write: Bad offset 0x%x\n", (int)offset);
- break;
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
+ return;
}
m5208_timer_update(s);
}
@@ -136,7 +137,8 @@ static uint64_t m5208_timer_read(void *opaque, hwaddr addr,
case 4:
return ptimer_get_count(s->timer);
default:
- hw_error("m5208_timer_read: Bad offset 0x%x\n", (int)addr);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, addr);
return 0;
}
}
@@ -164,7 +166,8 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
return 0;
default:
- hw_error("m5208_sys_read: Bad offset 0x%x\n", (int)addr);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, addr);
return 0;
}
}
@@ -172,7 +175,8 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
static void m5208_sys_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, addr);
}
static const MemoryRegionOps m5208_sys_ops = {
diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c
index d9e03a06ab..bc20742d9a 100644
--- a/hw/m68k/mcf_intc.c
+++ b/hw/m68k/mcf_intc.c
@@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
+#include "qemu/log.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/irq.h"
@@ -80,7 +81,9 @@ static uint64_t mcf_intc_read(void *opaque, hwaddr addr,
case 0xe1: case 0xe2: case 0xe3: case 0xe4:
case 0xe5: case 0xe6: case 0xe7:
/* LnIACK */
- hw_error("mcf_intc_read: LnIACK not implemented\n");
+ qemu_log_mask(LOG_UNIMP, "%s: LnIACK not implemented (offset 0x%02x)\n",
+ __func__, offset);
+ /* fallthru */
default:
return 0;
}
@@ -127,8 +130,9 @@ static void mcf_intc_write(void *opaque, hwaddr addr,
}
break;
default:
- hw_error("mcf_intc_write: Bad write offset %d\n", offset);
- break;
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%02x\n",
+ __func__, offset);
+ return;
}
mcf_intc_update(s);
}
diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c
index 9327ac8a30..281345862c 100644
--- a/hw/net/mcf_fec.c
+++ b/hw/net/mcf_fec.c
@@ -7,7 +7,7 @@
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
+#include "qemu/log.h"
#include "hw/irq.h"
#include "net/net.h"
#include "qemu/module.h"
@@ -392,7 +392,8 @@ static uint64_t mcf_fec_read(void *opaque, hwaddr addr,
case 0x188: return s->emrbr;
case 0x200 ... 0x2e0: return s->mib[(addr & 0x1ff) / 4];
default:
- hw_error("mcf_fec_read: Bad address 0x%x\n", (int)addr);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%" HWADDR_PRIX "\n",
+ __func__, addr);
return 0;
}
}
@@ -492,7 +493,9 @@ static void mcf_fec_write(void *opaque, hwaddr addr,
s->mib[(addr & 0x1ff) / 4] = value;
break;
default:
- hw_error("mcf_fec_write Bad address 0x%x\n", (int)addr);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%" HWADDR_PRIX "\n",
+ __func__, addr);
+ return;
}
mcf_fec_update(s);
}
--
2.26.2
^ permalink raw reply related [flat|nested] 4+ messages in thread