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Tsirkin" To: BALATON Zoltan Subject: Re: [PATCH v2 2/2] pci: ensure configuration access is within bounds Message-ID: <20200604073753-mutt-send-email-mst@kernel.org> References: <20200603202251.1199170-1-ppandit@redhat.com> <20200603202251.1199170-3-ppandit@redhat.com> <20200604054043-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Content-Disposition: inline Received-SPF: pass client-ip=207.211.31.120; envelope-from=mst@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/04 01:14:08 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel P =?iso-8859-1?Q?=2E_Berrang=E9?= , Prasad J Pandit , Yi Ren , QEMU Developers , P J P , Gerd Hoffmann , Ren Ding , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Hanqing Zhao Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Jun 04, 2020 at 01:37:13PM +0200, BALATON Zoltan wrote: > On Thu, 4 Jun 2020, Michael S. Tsirkin wrote: > > On Thu, Jun 04, 2020 at 08:07:52AM +0200, Philippe Mathieu-Daudé wrote: > > > On 6/4/20 12:13 AM, BALATON Zoltan wrote: > > > > On Thu, 4 Jun 2020, P J P wrote: > > > > > From: Prasad J Pandit > > > > > > > > > > While reading PCI configuration bytes, a guest may send an > > > > > address towards the end of the configuration space. It may lead > > > > > to an OOB access issue. Assert that 'address + len' is within > > > > > PCI configuration space. > > > > > > > > > > Suggested-by: Philippe Mathieu-Daudé > > > > > Signed-off-by: Prasad J Pandit > > > > > --- > > > > > hw/pci/pci.c | 2 ++ > > > > > 1 file changed, 2 insertions(+) > > > > > > > > > > Update v2: assert PCI configuration access is within bounds > > > > >  -> https://lists.gnu.org/archive/html/qemu-devel/2020-06/msg00711.html > > > > > > > > > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > > > > > index 70c66965f5..173bec4fd5 100644 > > > > > --- a/hw/pci/pci.c > > > > > +++ b/hw/pci/pci.c > > > > > @@ -1381,6 +1381,8 @@ uint32_t pci_default_read_config(PCIDevice *d, > > > > > { > > > > >     uint32_t val = 0; > > > > > > > > > > +    assert(address + len <= pci_config_size(d)); > > > > > > > > Does this allow guest now to crash QEMU? I think it was suggested that > > > > assert should only be used for cases that can only arise from a > > > > programming error and not from values set by the guest. If this is > > > > considered to be an error now to call this function with wrong > > > > parameters did you check other callers? I've found a few such as: > > > > > > > > hw/scsi/esp-pci.c > > > > hw/watchdog/wdt_i6300esb.c > > > > hw/ide/cmd646.c > > > > hw/vfio/pci.c > > > > > > > > and maybe others. Would it be better to not crash just log invalid > > > > access and either fix up parameters or return some garbage like 0? > > > > > > Yes, maybe I was not clear while reviewing v1, we need to audit the > > > callers and fix them first, then we can safely add the assert here. > > > > We can add assert here regardless of auditing callers. Doing that > > will also make fuzzying easier. But the assert is unrelated to CVE imho. > > I wonder why isn't the check added to pci_default_read_config() right away? > If we have an assert there the overhead is the same and adding the check > there would make it unnecessary to patch all callers so it's just one patch > instead of a whole series. > > Regards, > BALATON Zoltan We need to return something, and we can't be sure that callers will handle returning random stuff correctly. Callers know what to do on errors, we don't. -- MST