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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id b81sm3699867wmc.5.2020.06.09.09.02.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jun 2020 09:02:11 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 0/7] target/arm: Convert Neon 3-reg-diff to decodetree Date: Tue, 9 Jun 2020 17:02:02 +0100 Message-Id: <20200609160209.29960-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This patchset converts the Neon insns in the "3 registers of different lengths" group to decodetree. Patch 1 is a bugfix for an earlier part of the conversion that's now in master. I'm definitely finding that the new decodetree version of Neon is often easier to understand because we no longer try to accommodate multiple different kinds of widening/narrowing/etc insns in a single multi-pass loop: expanding out the loop and specializing it to the particular insn type helps a lot. (Or maybe it's just that having to read the old code and write the new version means I understand it better ;-)) Based-on: id:20200608183652.661386-1-richard.henderson@linaro.org ("[PATCH v3 0/9] decodetree: Add non-overlapping groups") because we use the new group syntax to set up the structure for the "size==0b11" vs "size!=0b11" decode which we'll fill in in subsequent patchsets. thanks -- PMM Peter Maydell (7): target/arm: Fix missing temp frees in do_vshll_2sh target/arm: Convert Neon 3-reg-diff prewidening ops to decodetree target/arm: Convert Neon 3-reg-diff narrowing ops to decodetree target/arm: Convert Neon 3-reg-diff VABAL, VABDL to decodetree target/arm: Convert Neon 3-reg-diff long multiplies target/arm: Convert Neon 3-reg-diff saturating doubling multiplies target/arm: Convert Neon 3-reg-diff polynomial VMULL target/arm/translate.h | 1 + target/arm/neon-dp.decode | 72 +++++ target/arm/translate-neon.inc.c | 521 ++++++++++++++++++++++++++++++++ target/arm/translate.c | 222 +------------- 4 files changed, 597 insertions(+), 219 deletions(-) -- 2.20.1