qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	peter.maydell@linaro.org, peterx@redhat.com
Cc: jean-philippe@linaro.org, robh@kernel.org, robin.murphy@arm.com,
	mst@redhat.com, zhangfei.gao@foxmail.com,
	shameerali.kolothum.thodi@huawei.com, will@kernel.org
Subject: [PATCH RESEND 1/9] hw/arm/smmu-common: Factorize some code in smmu_ptw_64()
Date: Thu, 11 Jun 2020 18:14:52 +0200	[thread overview]
Message-ID: <20200611161500.23580-2-eric.auger@redhat.com> (raw)
In-Reply-To: <20200611161500.23580-1-eric.auger@redhat.com>

Page and block PTE decoding can share some code. Let's
first handle table PTE and factorize some code shared by
page and block PTEs.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
 hw/arm/smmu-common.c | 51 ++++++++++++++++----------------------------
 1 file changed, 18 insertions(+), 33 deletions(-)

diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index e13a5f4a7c..f2de2be527 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -186,12 +186,12 @@ static int smmu_ptw_64(SMMUTransCfg *cfg,
         uint64_t subpage_size = 1ULL << level_shift(level, granule_sz);
         uint64_t mask = subpage_size - 1;
         uint32_t offset = iova_level_offset(iova, inputsize, level, granule_sz);
-        uint64_t pte;
+        uint64_t pte, gpa;
         dma_addr_t pte_addr = baseaddr + offset * sizeof(pte);
         uint8_t ap;
 
         if (get_pte(baseaddr, offset, &pte, info)) {
-                goto error;
+            break;
         }
         trace_smmu_ptw_level(level, iova, subpage_size,
                              baseaddr, offset, pte);
@@ -199,58 +199,43 @@ static int smmu_ptw_64(SMMUTransCfg *cfg,
         if (is_invalid_pte(pte) || is_reserved_pte(pte, level)) {
             trace_smmu_ptw_invalid_pte(stage, level, baseaddr,
                                        pte_addr, offset, pte);
-            info->type = SMMU_PTW_ERR_TRANSLATION;
-            goto error;
+            break;
         }
 
-        if (is_page_pte(pte, level)) {
-            uint64_t gpa = get_page_pte_address(pte, granule_sz);
+        if (is_table_pte(pte, level)) {
+            ap = PTE_APTABLE(pte);
 
-            ap = PTE_AP(pte);
             if (is_permission_fault(ap, perm)) {
                 info->type = SMMU_PTW_ERR_PERMISSION;
                 goto error;
             }
-
-            tlbe->translated_addr = gpa + (iova & mask);
-            tlbe->perm = PTE_AP_TO_PERM(ap);
+            baseaddr = get_table_pte_address(pte, granule_sz);
+            level++;
+            continue;
+        } else if (is_page_pte(pte, level)) {
+            gpa = get_page_pte_address(pte, granule_sz);
             trace_smmu_ptw_page_pte(stage, level, iova,
                                     baseaddr, pte_addr, pte, gpa);
-            return 0;
-        }
-        if (is_block_pte(pte, level)) {
+        } else {
             uint64_t block_size;
-            hwaddr gpa = get_block_pte_address(pte, level, granule_sz,
-                                               &block_size);
-
-            ap = PTE_AP(pte);
-            if (is_permission_fault(ap, perm)) {
-                info->type = SMMU_PTW_ERR_PERMISSION;
-                goto error;
-            }
 
+            gpa = get_block_pte_address(pte, level, granule_sz,
+                                        &block_size);
             trace_smmu_ptw_block_pte(stage, level, baseaddr,
                                      pte_addr, pte, iova, gpa,
                                      block_size >> 20);
-
-            tlbe->translated_addr = gpa + (iova & mask);
-            tlbe->perm = PTE_AP_TO_PERM(ap);
-            return 0;
         }
-
-        /* table pte */
-        ap = PTE_APTABLE(pte);
-
+        ap = PTE_AP(pte);
         if (is_permission_fault(ap, perm)) {
             info->type = SMMU_PTW_ERR_PERMISSION;
             goto error;
         }
-        baseaddr = get_table_pte_address(pte, granule_sz);
-        level++;
+
+        tlbe->translated_addr = gpa + (iova & mask);
+        tlbe->perm = PTE_AP_TO_PERM(ap);
+        return 0;
     }
-
     info->type = SMMU_PTW_ERR_TRANSLATION;
-
 error:
     tlbe->perm = IOMMU_NONE;
     return -EINVAL;
-- 
2.20.1



  reply	other threads:[~2020-06-11 16:19 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-11 16:14 [PATCH RESEND 0/9] SMMUv3.2 Range-based TLB Invalidation Support Eric Auger
2020-06-11 16:14 ` Eric Auger [this message]
2020-06-25 14:49   ` [PATCH RESEND 1/9] hw/arm/smmu-common: Factorize some code in smmu_ptw_64() Peter Maydell
2020-06-26 13:53     ` Auger Eric
2020-06-11 16:14 ` [PATCH RESEND 2/9] hw/arm/smmu-common: Add IOTLB helpers Eric Auger
2020-06-25 14:54   ` Peter Maydell
2020-06-11 16:14 ` [PATCH RESEND 3/9] hw/arm/smmu: Simplify the IOTLB key format Eric Auger
2020-06-25 15:03   ` Peter Maydell
2020-06-26 13:53     ` Auger Eric
2020-06-11 16:14 ` [PATCH RESEND 4/9] hw/arm/smmu: Introduce SMMUTLBEntry for PTW and IOTLB value Eric Auger
2020-06-25 15:13   ` Peter Maydell
2020-06-11 16:14 ` [PATCH RESEND 5/9] hw/arm/smmuv3: Store the starting level in SMMUTransTableInfo Eric Auger
2020-06-25 15:15   ` Peter Maydell
2020-06-26 13:58     ` Auger Eric
2020-06-11 16:14 ` [PATCH RESEND 6/9] hw/arm/smmu-common: Manage IOTLB block entries Eric Auger
2020-06-25 15:30   ` Peter Maydell
2020-06-26 13:53     ` Auger Eric
2020-06-30 15:46       ` Auger Eric
2020-06-30 15:50       ` Peter Maydell
2020-06-30 16:29         ` Auger Eric
2020-07-02 14:39           ` Auger Eric
2020-06-11 16:14 ` [PATCH RESEND 7/9] hw/arm/smmuv3: Introduce smmuv3_s1_range_inval() helper Eric Auger
2020-06-25 15:34   ` Peter Maydell
2020-06-11 16:14 ` [PATCH RESEND 8/9] hw/arm/smmuv3: Get prepared for range invalidation Eric Auger
2020-06-25 15:43   ` Peter Maydell
2020-06-11 16:15 ` [PATCH RESEND 9/9] hw/arm/smmuv3: Advertise SMMUv3.2 " Eric Auger
2020-06-25 15:40   ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200611161500.23580-2-eric.auger@redhat.com \
    --to=eric.auger@redhat.com \
    --cc=eric.auger.pro@gmail.com \
    --cc=jean-philippe@linaro.org \
    --cc=mst@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=peterx@redhat.com \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=robh@kernel.org \
    --cc=robin.murphy@arm.com \
    --cc=shameerali.kolothum.thodi@huawei.com \
    --cc=will@kernel.org \
    --cc=zhangfei.gao@foxmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).