From: Robert Foley <robert.foley@linaro.org>
To: qemu-devel@nongnu.org
Cc: robert.foley@linaro.org, cota@braap.org, qemu-ppc@nongnu.org,
peter.puhov@linaro.org, alex.bennee@linaro.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: [PATCH v10 18/73] ppc: convert to cpu_halted
Date: Wed, 17 Jun 2020 17:01:36 -0400 [thread overview]
Message-ID: <20200617210231.4393-19-robert.foley@linaro.org> (raw)
In-Reply-To: <20200617210231.4393-1-robert.foley@linaro.org>
From: "Emilio G. Cota" <cota@braap.org>
In ppce500_spin.c, acquire the lock just once to update
both cpu->halted and cpu->stopped.
In hw/ppc/spapr_hcall.c, acquire the lock just once to
update cpu->halted and call cpu_has_work, since later
in the series we'll acquire the BQL (if not already held)
from cpu_has_work.
Cc: qemu-ppc@nongnu.org
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Emilio G. Cota <cota@braap.org>
[RF: hw/ppc/spapr_hcall.c, spapr_rtas.c more conversions]
Signed-off-by: Robert Foley <robert.foley@linaro.org>
---
hw/ppc/e500.c | 4 ++--
hw/ppc/ppc.c | 10 +++++-----
hw/ppc/ppce500_spin.c | 6 ++++--
hw/ppc/spapr_cpu_core.c | 4 ++--
hw/ppc/spapr_hcall.c | 14 ++++++++------
hw/ppc/spapr_rtas.c | 8 ++++----
target/ppc/excp_helper.c | 4 ++--
target/ppc/helper_regs.h | 2 +-
target/ppc/kvm.c | 4 ++--
target/ppc/translate_init.inc.c | 8 ++++----
10 files changed, 34 insertions(+), 30 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 51bf95b303..89db681edd 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -706,7 +706,7 @@ static void ppce500_cpu_reset_sec(void *opaque)
/* Secondary CPU starts in halted state for now. Needs to change when
implementing non-kernel boot. */
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
cs->exception_index = EXCP_HLT;
}
@@ -720,7 +720,7 @@ static void ppce500_cpu_reset(void *opaque)
cpu_reset(cs);
/* Set initial guest state. */
- cs->halted = 0;
+ cpu_halted_set(cs, 0);
env->gpr[1] = (16 * MiB) - 8;
env->gpr[3] = bi->dt_base;
env->gpr[4] = 0;
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index 4a11fb1640..0e7386ff88 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -149,7 +149,7 @@ static void ppc6xx_set_irq(void *opaque, int pin, int level)
/* XXX: Note that the only way to restart the CPU is to reset it */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
}
break;
case PPC6xx_INPUT_HRESET:
@@ -228,10 +228,10 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
/* XXX: TODO: relay the signal to CKSTP_OUT pin */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
- cs->halted = 0;
+ cpu_halted_set(cs, 0);
qemu_cpu_kick(cs);
}
break;
@@ -445,10 +445,10 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
/* Level sensitive - active low */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
- cs->halted = 0;
+ cpu_halted_set(cs, 0);
qemu_cpu_kick(cs);
}
break;
diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c
index 66c1065db2..79313944cf 100644
--- a/hw/ppc/ppce500_spin.c
+++ b/hw/ppc/ppce500_spin.c
@@ -107,9 +107,11 @@ static void spin_kick(CPUState *cs, run_on_cpu_data data)
map_start = ldq_p(&curspin->addr) & ~(map_size - 1);
mmubooke_create_initial_mapping(env, 0, map_start, map_size);
- cs->halted = 0;
- cs->exception_index = -1;
+ cpu_mutex_lock(cs);
+ cpu_halted_set(cs, 0);
cs->stopped = false;
+ cpu_mutex_unlock(cs);
+ cs->exception_index = -1;
qemu_cpu_kick(cs);
}
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 26ad566f42..b69c6c292d 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -39,7 +39,7 @@ static void spapr_reset_vcpu(PowerPCCPU *cpu)
/* All CPUs start halted. CPU0 is unhalted from the machine level
* reset code and the rest are explicitly started up by the guest
* using an RTAS call */
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
env->spr[SPR_HIOR] = 0;
@@ -88,7 +88,7 @@ void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip,
env->gpr[3] = r3;
env->gpr[4] = r4;
kvmppc_set_reg_ppc_online(cpu, 1);
- CPU(cpu)->halted = 0;
+ cpu_halted_set(CPU(cpu), 0);
/* Enable Power-saving mode Exit Cause exceptions */
ppc_store_lpcr(cpu, env->spr[SPR_LPCR] | pcc->lpcr_pm);
}
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 0f54988f2e..e678ca29a5 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1058,17 +1058,19 @@ static target_ulong h_cede(PowerPCCPU *cpu, SpaprMachineState *spapr,
env->msr |= (1ULL << MSR_EE);
hreg_compute_hflags(env);
+ cpu_mutex_lock(cs);
if (spapr_cpu->prod) {
spapr_cpu->prod = false;
+ cpu_mutex_unlock(cs);
return H_SUCCESS;
}
if (!cpu_has_work(cs)) {
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
cs->exception_index = EXCP_HLT;
cs->exit_request = 1;
}
-
+ cpu_mutex_unlock(cs);
return H_SUCCESS;
}
@@ -1085,7 +1087,7 @@ static target_ulong h_confer_self(PowerPCCPU *cpu)
spapr_cpu->prod = false;
return H_SUCCESS;
}
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
cs->exception_index = EXCP_HALTED;
cs->exit_request = 1;
@@ -1116,7 +1118,7 @@ static target_ulong h_join(PowerPCCPU *cpu, SpaprMachineState *spapr,
}
/* Don't have a way to indicate joined, so use halted && MSR[EE]=0 */
- if (!cs->halted || (e->msr & (1ULL << MSR_EE))) {
+ if (!cpu_halted(cs) || (e->msr & (1ULL << MSR_EE))) {
last_unjoined = false;
break;
}
@@ -1199,7 +1201,7 @@ static target_ulong h_prod(PowerPCCPU *cpu, SpaprMachineState *spapr,
spapr_cpu = spapr_cpu_state(tcpu);
spapr_cpu->prod = true;
- cs->halted = 0;
+ cpu_halted_set(cs, 0);
qemu_cpu_kick(cs);
return H_SUCCESS;
@@ -1685,7 +1687,7 @@ target_ulong do_client_architecture_support(PowerPCCPU *cpu,
if (cs == CPU(cpu)) {
continue;
}
- if (!cs->halted) {
+ if (!cpu_halted(cs)) {
warn_report("guest has multiple active vCPUs at CAS, which is not allowed");
return H_MULTI_THREADS_ACTIVE;
}
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index bcac0d00e7..2306f2985e 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -111,7 +111,7 @@ static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
id = rtas_ld(args, 0);
cpu = spapr_find_cpu(id);
if (cpu != NULL) {
- if (CPU(cpu)->halted) {
+ if (cpu_halted(CPU(cpu))) {
rtas_st(rets, 1, 0);
} else {
rtas_st(rets, 1, 2);
@@ -155,7 +155,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
env = &newcpu->env;
pcc = POWERPC_CPU_GET_CLASS(newcpu);
- if (!CPU(newcpu)->halted) {
+ if (!cpu_halted(CPU(newcpu))) {
rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
return;
}
@@ -213,7 +213,7 @@ static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr,
*/
ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
env->spr[SPR_PSSCR] |= PSSCR_EC;
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
kvmppc_set_reg_ppc_online(cpu, 0);
qemu_cpu_kick(cs);
}
@@ -238,7 +238,7 @@ static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprMachineState *spapr,
}
/* See h_join */
- if (!cs->halted || (e->msr & (1ULL << MSR_EE))) {
+ if (!cpu_halted(cs) || (e->msr & (1ULL << MSR_EE))) {
rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE);
return;
}
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index a988ba15f4..507f64c9e7 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -305,7 +305,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
qemu_log("Machine check while not allowed. "
"Entering checkstop state\n");
}
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
cpu_interrupt_exittb(cs);
}
if (env->msr_mask & MSR_HVB) {
@@ -1134,7 +1134,7 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t insn)
CPUState *cs;
cs = env_cpu(env);
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
/*
* The architecture specifies that HDEC interrupts are discarded
diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h
index d78c2af63e..f84438f639 100644
--- a/target/ppc/helper_regs.h
+++ b/target/ppc/helper_regs.h
@@ -168,7 +168,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
#if !defined(CONFIG_USER_ONLY)
if (unlikely(msr_pow == 1)) {
if (!env->pending_interrupts && (*env->check_pow)(env)) {
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
excp = EXCP_HALTED;
}
}
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 2692f76130..aae2ef0ad4 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -1342,7 +1342,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
int kvm_arch_process_async_events(CPUState *cs)
{
- return cs->halted;
+ return cpu_halted(cs);
}
static int kvmppc_handle_halt(PowerPCCPU *cpu)
@@ -1351,7 +1351,7 @@ static int kvmppc_handle_halt(PowerPCCPU *cpu)
CPUPPCState *env = &cpu->env;
if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
cs->exception_index = EXCP_HLT;
}
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index a40888411c..ac59648541 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -8540,7 +8540,7 @@ static bool cpu_has_work_POWER7(CPUState *cs)
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
- if (cs->halted) {
+ if (cpu_halted(cs)) {
if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
return false;
}
@@ -8702,7 +8702,7 @@ static bool cpu_has_work_POWER8(CPUState *cs)
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
- if (cs->halted) {
+ if (cpu_halted(cs)) {
if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
return false;
}
@@ -8902,7 +8902,7 @@ static bool cpu_has_work_POWER9(CPUState *cs)
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
- if (cs->halted) {
+ if (cpu_halted(cs)) {
uint64_t psscr = env->spr[SPR_PSSCR];
if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
@@ -9118,7 +9118,7 @@ static bool cpu_has_work_POWER10(CPUState *cs)
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
- if (cs->halted) {
+ if (cpu_halted(cs)) {
uint64_t psscr = env->spr[SPR_PSSCR];
if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
--
2.17.1
next prev parent reply other threads:[~2020-06-17 21:13 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-17 21:01 [PATCH v10 00/73] per-CPU locks Robert Foley
2020-06-17 21:01 ` [PATCH v10 01/73] cpu: rename cpu->work_mutex to cpu->lock Robert Foley
2020-06-17 21:01 ` [PATCH v10 02/73] cpu: introduce cpu_mutex_lock/unlock Robert Foley
2020-06-17 21:01 ` [PATCH v10 03/73] cpu: make qemu_work_cond per-cpu Robert Foley
2020-06-17 21:01 ` [PATCH v10 04/73] cpu: move run_on_cpu to cpus-common Robert Foley
2020-06-17 21:01 ` [PATCH v10 05/73] cpu: introduce process_queued_cpu_work_locked Robert Foley
2020-06-17 21:01 ` [PATCH v10 06/73] cpu: make per-CPU locks an alias of the BQL in TCG rr mode Robert Foley
2020-06-17 21:01 ` [PATCH v10 07/73] tcg-runtime: define helper_cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 08/73] ppc: convert to helper_cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 09/73] cris: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 10/73] hppa: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 11/73] m68k: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 12/73] alpha: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 13/73] microblaze: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 14/73] cpu: define cpu_halted helpers Robert Foley
2020-06-17 21:01 ` [PATCH v10 15/73] tcg-runtime: convert to cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 16/73] hw/semihosting: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 17/73] arm: convert to cpu_halted Robert Foley
2020-06-17 21:01 ` Robert Foley [this message]
2020-06-17 21:01 ` [PATCH v10 19/73] sh4: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 20/73] i386: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 21/73] lm32: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 22/73] m68k: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 23/73] mips: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 24/73] riscv: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 25/73] s390x: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 26/73] sparc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 27/73] xtensa: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 28/73] gdbstub: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 29/73] openrisc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 30/73] cpu-exec: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 31/73] cpu: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 32/73] cpu: define cpu_interrupt_request helpers Robert Foley
2020-06-17 21:01 ` [PATCH v10 33/73] ppc: use cpu_reset_interrupt Robert Foley
2020-06-17 21:01 ` [PATCH v10 34/73] exec: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 35/73] i386: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 36/73] s390x: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 37/73] openrisc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 38/73] arm: convert to cpu_interrupt_request Robert Foley
2020-06-17 21:01 ` [PATCH v10 39/73] i386: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 40/73] i386/kvm: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 41/73] i386/hax-all: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 42/73] i386/whpx-all: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 43/73] i386/hvf: convert to cpu_request_interrupt Robert Foley
2020-06-17 21:02 ` [PATCH v10 44/73] ppc: convert to cpu_interrupt_request Robert Foley
2020-06-17 21:02 ` [PATCH v10 45/73] sh4: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 46/73] cris: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 47/73] hppa: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 48/73] lm32: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 49/73] m68k: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 50/73] mips: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 51/73] nios: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 52/73] s390x: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 53/73] alpha: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 54/73] moxie: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 55/73] sparc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 56/73] openrisc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 57/73] unicore32: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 58/73] microblaze: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 59/73] accel/tcg: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 60/73] cpu: convert to interrupt_request Robert Foley
2020-06-17 21:02 ` [PATCH v10 61/73] cpu: call .cpu_has_work with the CPU lock held Robert Foley
2020-06-17 21:02 ` [PATCH v10 62/73] cpu: introduce cpu_has_work_with_iothread_lock Robert Foley
2020-06-17 21:02 ` [PATCH v10 63/73] ppc: convert to cpu_has_work_with_iothread_lock Robert Foley
2020-06-17 21:02 ` [PATCH v10 64/73] mips: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 65/73] s390x: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 66/73] riscv: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 67/73] sparc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 68/73] xtensa: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 69/73] cpu: rename all_cpu_threads_idle to qemu_tcg_rr_all_cpu_threads_idle Robert Foley
2020-06-17 21:02 ` [PATCH v10 70/73] cpu: protect CPU state with cpu->lock instead of the BQL Robert Foley
2020-06-17 21:02 ` [PATCH v10 71/73] cpus-common: release BQL earlier in run_on_cpu Robert Foley
2020-06-17 21:02 ` [PATCH v10 72/73] cpu: add async_run_on_cpu_no_bql Robert Foley
2020-06-17 21:02 ` [PATCH v10 73/73] cputlb: queue async flush jobs without the BQL Robert Foley
2020-06-17 22:20 ` [PATCH v10 00/73] per-CPU locks no-reply
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