From: Robert Foley <robert.foley@linaro.org>
To: qemu-devel@nongnu.org
Cc: robert.foley@linaro.org,
"open list:X86 KVM CPUs" <kvm@vger.kernel.org>,
Marcelo Tosatti <mtosatti@redhat.com>,
Eduardo Habkost <ehabkost@redhat.com>,
Roman Bolshakov <r.bolshakov@yadro.com>,
cota@braap.org, "open list:X86 HAXM CPUs" <haxm-team@intel.com>,
Wenchao Wang <wenchao.wang@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
peter.puhov@linaro.org, Sunil Muthuswamy <sunilmut@microsoft.com>,
Richard Henderson <rth@twiddle.net>,
alex.bennee@linaro.org, Colin Xu <colin.xu@intel.com>
Subject: [PATCH v10 35/73] i386: use cpu_reset_interrupt
Date: Wed, 17 Jun 2020 17:01:53 -0400 [thread overview]
Message-ID: <20200617210231.4393-36-robert.foley@linaro.org> (raw)
In-Reply-To: <20200617210231.4393-1-robert.foley@linaro.org>
From: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Robert Foley <robert.foley@linaro.org>
---
target/i386/hax-all.c | 4 ++--
target/i386/hvf/x86hvf.c | 8 ++++----
target/i386/kvm.c | 14 +++++++-------
target/i386/seg_helper.c | 13 ++++++-------
target/i386/svm_helper.c | 2 +-
target/i386/whpx-all.c | 10 +++++-----
6 files changed, 25 insertions(+), 26 deletions(-)
diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c
index acfb7a6e10..6a4152730f 100644
--- a/target/i386/hax-all.c
+++ b/target/i386/hax-all.c
@@ -438,7 +438,7 @@ static int hax_vcpu_interrupt(CPUArchState *env)
irq = cpu_get_pic_interrupt(env);
if (irq >= 0) {
hax_inject_interrupt(env, irq);
- cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD);
}
}
@@ -486,7 +486,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env)
}
if (cpu->interrupt_request & CPU_INTERRUPT_POLL) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_POLL;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
apic_poll_irq(x86_cpu->apic_state);
}
diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c
index c09cf160ef..8e9b60d0a7 100644
--- a/target/i386/hvf/x86hvf.c
+++ b/target/i386/hvf/x86hvf.c
@@ -402,7 +402,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state)
if (cpu_state->interrupt_request & CPU_INTERRUPT_NMI) {
if (!(env->hflags2 & HF2_NMI_MASK) && !(info & VMCS_INTR_VALID)) {
- cpu_state->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_NMI);
info = VMCS_INTR_VALID | VMCS_INTR_T_NMI | EXCP02_NMI;
wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info);
} else {
@@ -414,7 +414,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state)
(cpu_state->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK) && !(info & VMCS_INTR_VALID)) {
int line = cpu_get_pic_interrupt(&x86cpu->env);
- cpu_state->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_HARD);
if (line >= 0) {
wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, line |
VMCS_INTR_VALID | VMCS_INTR_T_HWINTR);
@@ -440,7 +440,7 @@ int hvf_process_events(CPUState *cpu_state)
}
if (cpu_state->interrupt_request & CPU_INTERRUPT_POLL) {
- cpu_state->interrupt_request &= ~CPU_INTERRUPT_POLL;
+ cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_POLL);
apic_poll_irq(cpu->apic_state);
}
if (((cpu_state->interrupt_request & CPU_INTERRUPT_HARD) &&
@@ -453,7 +453,7 @@ int hvf_process_events(CPUState *cpu_state)
do_cpu_sipi(cpu);
}
if (cpu_state->interrupt_request & CPU_INTERRUPT_TPR) {
- cpu_state->interrupt_request &= ~CPU_INTERRUPT_TPR;
+ cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_TPR);
hvf_cpu_synchronize_state(cpu_state);
apic_handle_tpr_access_report(cpu->apic_state, env->eip,
env->tpr_access_type);
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index eda51904dd..8628fa9111 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -3658,7 +3658,7 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level)
*/
events.smi.pending = cs->interrupt_request & CPU_INTERRUPT_SMI;
events.smi.latched_init = cs->interrupt_request & CPU_INTERRUPT_INIT;
- cs->interrupt_request &= ~(CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI);
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI);
} else {
/* Keep these in cs->interrupt_request. */
events.smi.pending = 0;
@@ -4021,7 +4021,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) {
if (cpu->interrupt_request & CPU_INTERRUPT_NMI) {
qemu_mutex_lock_iothread();
- cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI);
qemu_mutex_unlock_iothread();
DPRINTF("injected NMI\n");
ret = kvm_vcpu_ioctl(cpu, KVM_NMI);
@@ -4032,7 +4032,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
}
if (cpu->interrupt_request & CPU_INTERRUPT_SMI) {
qemu_mutex_lock_iothread();
- cpu->interrupt_request &= ~CPU_INTERRUPT_SMI;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI);
qemu_mutex_unlock_iothread();
DPRINTF("injected SMI\n");
ret = kvm_vcpu_ioctl(cpu, KVM_SMI);
@@ -4068,7 +4068,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
(env->eflags & IF_MASK)) {
int irq;
- cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD);
irq = cpu_get_pic_interrupt(env);
if (irq >= 0) {
struct kvm_interrupt intr;
@@ -4139,7 +4139,7 @@ int kvm_arch_process_async_events(CPUState *cs)
/* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
assert(env->mcg_cap);
- cs->interrupt_request &= ~CPU_INTERRUPT_MCE;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_MCE);
kvm_cpu_synchronize_state(cs);
@@ -4169,7 +4169,7 @@ int kvm_arch_process_async_events(CPUState *cs)
}
if (cs->interrupt_request & CPU_INTERRUPT_POLL) {
- cs->interrupt_request &= ~CPU_INTERRUPT_POLL;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL);
apic_poll_irq(cpu->apic_state);
}
if (((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
@@ -4182,7 +4182,7 @@ int kvm_arch_process_async_events(CPUState *cs)
do_cpu_sipi(cpu);
}
if (cs->interrupt_request & CPU_INTERRUPT_TPR) {
- cs->interrupt_request &= ~CPU_INTERRUPT_TPR;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_TPR);
kvm_cpu_synchronize_state(cs);
apic_handle_tpr_access_report(cpu->apic_state, env->eip,
env->tpr_access_type);
diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c
index b96de068ca..818f65f35f 100644
--- a/target/i386/seg_helper.c
+++ b/target/i386/seg_helper.c
@@ -1332,7 +1332,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
switch (interrupt_request) {
#if !defined(CONFIG_USER_ONLY)
case CPU_INTERRUPT_POLL:
- cs->interrupt_request &= ~CPU_INTERRUPT_POLL;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL);
apic_poll_irq(cpu->apic_state);
break;
#endif
@@ -1341,23 +1341,22 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
break;
case CPU_INTERRUPT_SMI:
cpu_svm_check_intercept_param(env, SVM_EXIT_SMI, 0, 0);
- cs->interrupt_request &= ~CPU_INTERRUPT_SMI;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_SMI);
do_smm_enter(cpu);
break;
case CPU_INTERRUPT_NMI:
cpu_svm_check_intercept_param(env, SVM_EXIT_NMI, 0, 0);
- cs->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_NMI);
env->hflags2 |= HF2_NMI_MASK;
do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);
break;
case CPU_INTERRUPT_MCE:
- cs->interrupt_request &= ~CPU_INTERRUPT_MCE;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_MCE);
do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);
break;
case CPU_INTERRUPT_HARD:
cpu_svm_check_intercept_param(env, SVM_EXIT_INTR, 0, 0);
- cs->interrupt_request &= ~(CPU_INTERRUPT_HARD |
- CPU_INTERRUPT_VIRQ);
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
intno = cpu_get_pic_interrupt(env);
qemu_log_mask(CPU_LOG_TB_IN_ASM,
"Servicing hardware INT=0x%02x\n", intno);
@@ -1372,7 +1371,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
qemu_log_mask(CPU_LOG_TB_IN_ASM,
"Servicing virtual hardware INT=0x%02x\n", intno);
do_interrupt_x86_hardirq(env, intno, 1);
- cs->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ);
break;
#endif
}
diff --git a/target/i386/svm_helper.c b/target/i386/svm_helper.c
index 7b8105a1c3..63eb136743 100644
--- a/target/i386/svm_helper.c
+++ b/target/i386/svm_helper.c
@@ -700,7 +700,7 @@ void do_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1)
env->hflags &= ~HF_GUEST_MASK;
env->intercept = 0;
env->intercept_exceptions = 0;
- cs->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ);
env->tsc_offset = 0;
env->gdt.base = x86_ldq_phys(cs, env->vm_hsave + offsetof(struct vmcb,
diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c
index efc2d88810..d5beb4a5e2 100644
--- a/target/i386/whpx-all.c
+++ b/target/i386/whpx-all.c
@@ -790,14 +790,14 @@ static void whpx_vcpu_pre_run(CPUState *cpu)
if (!vcpu->interruption_pending &&
cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) {
if (cpu->interrupt_request & CPU_INTERRUPT_NMI) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI);
vcpu->interruptable = false;
new_int.InterruptionType = WHvX64PendingNmi;
new_int.InterruptionPending = 1;
new_int.InterruptionVector = 2;
}
if (cpu->interrupt_request & CPU_INTERRUPT_SMI) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_SMI;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI);
}
}
@@ -820,7 +820,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu)
vcpu->interruptable && (env->eflags & IF_MASK)) {
assert(!new_int.InterruptionPending);
if (cpu->interrupt_request & CPU_INTERRUPT_HARD) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD);
irq = cpu_get_pic_interrupt(env);
if (irq >= 0) {
new_int.InterruptionType = WHvX64PendingInterrupt;
@@ -911,7 +911,7 @@ static void whpx_vcpu_process_async_events(CPUState *cpu)
}
if (cpu->interrupt_request & CPU_INTERRUPT_POLL) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_POLL;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
apic_poll_irq(x86_cpu->apic_state);
}
@@ -927,7 +927,7 @@ static void whpx_vcpu_process_async_events(CPUState *cpu)
}
if (cpu->interrupt_request & CPU_INTERRUPT_TPR) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_TPR;
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_TPR);
whpx_cpu_synchronize_state(cpu);
apic_handle_tpr_access_report(x86_cpu->apic_state, env->eip,
env->tpr_access_type);
--
2.17.1
next prev parent reply other threads:[~2020-06-17 21:23 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-17 21:01 [PATCH v10 00/73] per-CPU locks Robert Foley
2020-06-17 21:01 ` [PATCH v10 01/73] cpu: rename cpu->work_mutex to cpu->lock Robert Foley
2020-06-17 21:01 ` [PATCH v10 02/73] cpu: introduce cpu_mutex_lock/unlock Robert Foley
2020-06-17 21:01 ` [PATCH v10 03/73] cpu: make qemu_work_cond per-cpu Robert Foley
2020-06-17 21:01 ` [PATCH v10 04/73] cpu: move run_on_cpu to cpus-common Robert Foley
2020-06-17 21:01 ` [PATCH v10 05/73] cpu: introduce process_queued_cpu_work_locked Robert Foley
2020-06-17 21:01 ` [PATCH v10 06/73] cpu: make per-CPU locks an alias of the BQL in TCG rr mode Robert Foley
2020-06-17 21:01 ` [PATCH v10 07/73] tcg-runtime: define helper_cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 08/73] ppc: convert to helper_cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 09/73] cris: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 10/73] hppa: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 11/73] m68k: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 12/73] alpha: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 13/73] microblaze: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 14/73] cpu: define cpu_halted helpers Robert Foley
2020-06-17 21:01 ` [PATCH v10 15/73] tcg-runtime: convert to cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 16/73] hw/semihosting: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 17/73] arm: convert to cpu_halted Robert Foley
2020-06-17 21:01 ` [PATCH v10 18/73] ppc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 19/73] sh4: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 20/73] i386: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 21/73] lm32: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 22/73] m68k: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 23/73] mips: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 24/73] riscv: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 25/73] s390x: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 26/73] sparc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 27/73] xtensa: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 28/73] gdbstub: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 29/73] openrisc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 30/73] cpu-exec: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 31/73] cpu: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 32/73] cpu: define cpu_interrupt_request helpers Robert Foley
2020-06-17 21:01 ` [PATCH v10 33/73] ppc: use cpu_reset_interrupt Robert Foley
2020-06-17 21:01 ` [PATCH v10 34/73] exec: " Robert Foley
2020-06-17 21:01 ` Robert Foley [this message]
2020-06-17 21:01 ` [PATCH v10 36/73] s390x: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 37/73] openrisc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 38/73] arm: convert to cpu_interrupt_request Robert Foley
2020-06-17 21:01 ` [PATCH v10 39/73] i386: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 40/73] i386/kvm: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 41/73] i386/hax-all: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 42/73] i386/whpx-all: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 43/73] i386/hvf: convert to cpu_request_interrupt Robert Foley
2020-06-17 21:02 ` [PATCH v10 44/73] ppc: convert to cpu_interrupt_request Robert Foley
2020-06-17 21:02 ` [PATCH v10 45/73] sh4: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 46/73] cris: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 47/73] hppa: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 48/73] lm32: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 49/73] m68k: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 50/73] mips: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 51/73] nios: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 52/73] s390x: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 53/73] alpha: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 54/73] moxie: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 55/73] sparc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 56/73] openrisc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 57/73] unicore32: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 58/73] microblaze: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 59/73] accel/tcg: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 60/73] cpu: convert to interrupt_request Robert Foley
2020-06-17 21:02 ` [PATCH v10 61/73] cpu: call .cpu_has_work with the CPU lock held Robert Foley
2020-06-17 21:02 ` [PATCH v10 62/73] cpu: introduce cpu_has_work_with_iothread_lock Robert Foley
2020-06-17 21:02 ` [PATCH v10 63/73] ppc: convert to cpu_has_work_with_iothread_lock Robert Foley
2020-06-17 21:02 ` [PATCH v10 64/73] mips: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 65/73] s390x: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 66/73] riscv: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 67/73] sparc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 68/73] xtensa: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 69/73] cpu: rename all_cpu_threads_idle to qemu_tcg_rr_all_cpu_threads_idle Robert Foley
2020-06-17 21:02 ` [PATCH v10 70/73] cpu: protect CPU state with cpu->lock instead of the BQL Robert Foley
2020-06-17 21:02 ` [PATCH v10 71/73] cpus-common: release BQL earlier in run_on_cpu Robert Foley
2020-06-17 21:02 ` [PATCH v10 72/73] cpu: add async_run_on_cpu_no_bql Robert Foley
2020-06-17 21:02 ` [PATCH v10 73/73] cputlb: queue async flush jobs without the BQL Robert Foley
2020-06-17 22:20 ` [PATCH v10 00/73] per-CPU locks no-reply
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