From: Robert Foley <robert.foley@linaro.org>
To: qemu-devel@nongnu.org
Cc: robert.foley@linaro.org,
"open list:X86 KVM CPUs" <kvm@vger.kernel.org>,
Marcelo Tosatti <mtosatti@redhat.com>,
Eduardo Habkost <ehabkost@redhat.com>,
cota@braap.org, Paolo Bonzini <pbonzini@redhat.com>,
peter.puhov@linaro.org, alex.bennee@linaro.org,
Richard Henderson <rth@twiddle.net>
Subject: [PATCH v10 40/73] i386/kvm: convert to cpu_interrupt_request
Date: Wed, 17 Jun 2020 17:01:58 -0400 [thread overview]
Message-ID: <20200617210231.4393-41-robert.foley@linaro.org> (raw)
In-Reply-To: <20200617210231.4393-1-robert.foley@linaro.org>
From: "Emilio G. Cota" <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Robert Foley <robert.foley@linaro.org>
---
target/i386/kvm.c | 58 ++++++++++++++++++++++++++++-------------------
1 file changed, 35 insertions(+), 23 deletions(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 8628fa9111..415a6d8114 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -3653,11 +3653,14 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level)
events.smi.smm = !!(env->hflags & HF_SMM_MASK);
events.smi.smm_inside_nmi = !!(env->hflags2 & HF2_SMM_INSIDE_NMI_MASK);
if (kvm_irqchip_in_kernel()) {
+ uint32_t interrupt_request;
+
/* As soon as these are moved to the kernel, remove them
* from cs->interrupt_request.
*/
- events.smi.pending = cs->interrupt_request & CPU_INTERRUPT_SMI;
- events.smi.latched_init = cs->interrupt_request & CPU_INTERRUPT_INIT;
+ interrupt_request = cpu_interrupt_request(cs);
+ events.smi.pending = interrupt_request & CPU_INTERRUPT_SMI;
+ events.smi.latched_init = interrupt_request & CPU_INTERRUPT_INIT;
cpu_reset_interrupt(cs, CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI);
} else {
/* Keep these in cs->interrupt_request. */
@@ -4015,14 +4018,14 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
{
X86CPU *x86_cpu = X86_CPU(cpu);
CPUX86State *env = &x86_cpu->env;
+ uint32_t interrupt_request;
int ret;
+ interrupt_request = cpu_interrupt_request(cpu);
/* Inject NMI */
- if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) {
- if (cpu->interrupt_request & CPU_INTERRUPT_NMI) {
- qemu_mutex_lock_iothread();
+ if (interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) {
+ if (interrupt_request & CPU_INTERRUPT_NMI) {
cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI);
- qemu_mutex_unlock_iothread();
DPRINTF("injected NMI\n");
ret = kvm_vcpu_ioctl(cpu, KVM_NMI);
if (ret < 0) {
@@ -4030,10 +4033,8 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
strerror(-ret));
}
}
- if (cpu->interrupt_request & CPU_INTERRUPT_SMI) {
- qemu_mutex_lock_iothread();
+ if (interrupt_request & CPU_INTERRUPT_SMI) {
cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI);
- qemu_mutex_unlock_iothread();
DPRINTF("injected SMI\n");
ret = kvm_vcpu_ioctl(cpu, KVM_SMI);
if (ret < 0) {
@@ -4047,16 +4048,22 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
qemu_mutex_lock_iothread();
}
+ /*
+ * We might have cleared some bits in cpu->interrupt_request since reading
+ * it; read it again.
+ */
+ interrupt_request = cpu_interrupt_request(cpu);
+
/* Force the VCPU out of its inner loop to process any INIT requests
* or (for userspace APIC, but it is cheap to combine the checks here)
* pending TPR access reports.
*/
- if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) {
- if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) &&
+ if (interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) {
+ if ((interrupt_request & CPU_INTERRUPT_INIT) &&
!(env->hflags & HF_SMM_MASK)) {
cpu->exit_request = 1;
}
- if (cpu->interrupt_request & CPU_INTERRUPT_TPR) {
+ if (interrupt_request & CPU_INTERRUPT_TPR) {
cpu->exit_request = 1;
}
}
@@ -4064,7 +4071,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
if (!kvm_pic_in_kernel()) {
/* Try to inject an interrupt if the guest can accept it */
if (run->ready_for_interrupt_injection &&
- (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) {
int irq;
@@ -4088,7 +4095,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
* interrupt, request an interrupt window exit. This will
* cause a return to userspace as soon as the guest is ready to
* receive interrupts. */
- if ((cpu->interrupt_request & CPU_INTERRUPT_HARD)) {
+ if ((cpu_interrupt_request(cpu) & CPU_INTERRUPT_HARD)) {
run->request_interrupt_window = 1;
} else {
run->request_interrupt_window = 0;
@@ -4134,8 +4141,9 @@ int kvm_arch_process_async_events(CPUState *cs)
{
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
+ uint32_t interrupt_request;
- if (cs->interrupt_request & CPU_INTERRUPT_MCE) {
+ if (cpu_interrupt_request(cs) & CPU_INTERRUPT_MCE) {
/* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
assert(env->mcg_cap);
@@ -4158,7 +4166,7 @@ int kvm_arch_process_async_events(CPUState *cs)
}
}
- if ((cs->interrupt_request & CPU_INTERRUPT_INIT) &&
+ if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_INIT) &&
!(env->hflags & HF_SMM_MASK)) {
kvm_cpu_synchronize_state(cs);
do_cpu_init(cpu);
@@ -4168,20 +4176,21 @@ int kvm_arch_process_async_events(CPUState *cs)
return 0;
}
- if (cs->interrupt_request & CPU_INTERRUPT_POLL) {
+ if (cpu_interrupt_request(cs) & CPU_INTERRUPT_POLL) {
cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL);
apic_poll_irq(cpu->apic_state);
}
- if (((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
+ interrupt_request = cpu_interrupt_request(cs);
+ if (((interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
- (cs->interrupt_request & CPU_INTERRUPT_NMI)) {
+ (interrupt_request & CPU_INTERRUPT_NMI)) {
cpu_halted_set(cs, 0);
}
- if (cs->interrupt_request & CPU_INTERRUPT_SIPI) {
+ if (interrupt_request & CPU_INTERRUPT_SIPI) {
kvm_cpu_synchronize_state(cs);
do_cpu_sipi(cpu);
}
- if (cs->interrupt_request & CPU_INTERRUPT_TPR) {
+ if (cpu_interrupt_request(cs) & CPU_INTERRUPT_TPR) {
cpu_reset_interrupt(cs, CPU_INTERRUPT_TPR);
kvm_cpu_synchronize_state(cs);
apic_handle_tpr_access_report(cpu->apic_state, env->eip,
@@ -4195,10 +4204,13 @@ static int kvm_handle_halt(X86CPU *cpu)
{
CPUState *cs = CPU(cpu);
CPUX86State *env = &cpu->env;
+ uint32_t interrupt_request;
+
+ interrupt_request = cpu_interrupt_request(cs);
- if (!((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if (!((interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) &&
- !(cs->interrupt_request & CPU_INTERRUPT_NMI)) {
+ !(interrupt_request & CPU_INTERRUPT_NMI)) {
cpu_halted_set(cs, 1);
return EXCP_HLT;
}
--
2.17.1
next prev parent reply other threads:[~2020-06-17 21:20 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-17 21:01 [PATCH v10 00/73] per-CPU locks Robert Foley
2020-06-17 21:01 ` [PATCH v10 01/73] cpu: rename cpu->work_mutex to cpu->lock Robert Foley
2020-06-17 21:01 ` [PATCH v10 02/73] cpu: introduce cpu_mutex_lock/unlock Robert Foley
2020-06-17 21:01 ` [PATCH v10 03/73] cpu: make qemu_work_cond per-cpu Robert Foley
2020-06-17 21:01 ` [PATCH v10 04/73] cpu: move run_on_cpu to cpus-common Robert Foley
2020-06-17 21:01 ` [PATCH v10 05/73] cpu: introduce process_queued_cpu_work_locked Robert Foley
2020-06-17 21:01 ` [PATCH v10 06/73] cpu: make per-CPU locks an alias of the BQL in TCG rr mode Robert Foley
2020-06-17 21:01 ` [PATCH v10 07/73] tcg-runtime: define helper_cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 08/73] ppc: convert to helper_cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 09/73] cris: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 10/73] hppa: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 11/73] m68k: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 12/73] alpha: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 13/73] microblaze: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 14/73] cpu: define cpu_halted helpers Robert Foley
2020-06-17 21:01 ` [PATCH v10 15/73] tcg-runtime: convert to cpu_halted_set Robert Foley
2020-06-17 21:01 ` [PATCH v10 16/73] hw/semihosting: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 17/73] arm: convert to cpu_halted Robert Foley
2020-06-17 21:01 ` [PATCH v10 18/73] ppc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 19/73] sh4: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 20/73] i386: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 21/73] lm32: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 22/73] m68k: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 23/73] mips: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 24/73] riscv: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 25/73] s390x: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 26/73] sparc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 27/73] xtensa: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 28/73] gdbstub: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 29/73] openrisc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 30/73] cpu-exec: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 31/73] cpu: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 32/73] cpu: define cpu_interrupt_request helpers Robert Foley
2020-06-17 21:01 ` [PATCH v10 33/73] ppc: use cpu_reset_interrupt Robert Foley
2020-06-17 21:01 ` [PATCH v10 34/73] exec: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 35/73] i386: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 36/73] s390x: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 37/73] openrisc: " Robert Foley
2020-06-17 21:01 ` [PATCH v10 38/73] arm: convert to cpu_interrupt_request Robert Foley
2020-06-17 21:01 ` [PATCH v10 39/73] i386: " Robert Foley
2020-06-17 21:01 ` Robert Foley [this message]
2020-06-17 21:01 ` [PATCH v10 41/73] i386/hax-all: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 42/73] i386/whpx-all: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 43/73] i386/hvf: convert to cpu_request_interrupt Robert Foley
2020-06-17 21:02 ` [PATCH v10 44/73] ppc: convert to cpu_interrupt_request Robert Foley
2020-06-17 21:02 ` [PATCH v10 45/73] sh4: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 46/73] cris: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 47/73] hppa: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 48/73] lm32: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 49/73] m68k: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 50/73] mips: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 51/73] nios: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 52/73] s390x: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 53/73] alpha: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 54/73] moxie: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 55/73] sparc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 56/73] openrisc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 57/73] unicore32: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 58/73] microblaze: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 59/73] accel/tcg: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 60/73] cpu: convert to interrupt_request Robert Foley
2020-06-17 21:02 ` [PATCH v10 61/73] cpu: call .cpu_has_work with the CPU lock held Robert Foley
2020-06-17 21:02 ` [PATCH v10 62/73] cpu: introduce cpu_has_work_with_iothread_lock Robert Foley
2020-06-17 21:02 ` [PATCH v10 63/73] ppc: convert to cpu_has_work_with_iothread_lock Robert Foley
2020-06-17 21:02 ` [PATCH v10 64/73] mips: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 65/73] s390x: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 66/73] riscv: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 67/73] sparc: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 68/73] xtensa: " Robert Foley
2020-06-17 21:02 ` [PATCH v10 69/73] cpu: rename all_cpu_threads_idle to qemu_tcg_rr_all_cpu_threads_idle Robert Foley
2020-06-17 21:02 ` [PATCH v10 70/73] cpu: protect CPU state with cpu->lock instead of the BQL Robert Foley
2020-06-17 21:02 ` [PATCH v10 71/73] cpus-common: release BQL earlier in run_on_cpu Robert Foley
2020-06-17 21:02 ` [PATCH v10 72/73] cpu: add async_run_on_cpu_no_bql Robert Foley
2020-06-17 21:02 ` [PATCH v10 73/73] cputlb: queue async flush jobs without the BQL Robert Foley
2020-06-17 22:20 ` [PATCH v10 00/73] per-CPU locks no-reply
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