* [PATCH] libqos: pci-pc: use 32-bit write for EJ register
@ 2020-06-23 16:18 Paolo Bonzini
2020-06-23 20:55 ` Michael S. Tsirkin
2020-06-24 7:46 ` Thomas Huth
0 siblings, 2 replies; 5+ messages in thread
From: Paolo Bonzini @ 2020-06-23 16:18 UTC (permalink / raw)
To: qemu-devel; +Cc: thuth, kraxel, mst
The memory region ops have min_access_size == 4 so obey it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
tests/qtest/libqos/pci-pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/libqos/pci-pc.c b/tests/qtest/libqos/pci-pc.c
index 0bc591d1da..3bb2eb3ba8 100644
--- a/tests/qtest/libqos/pci-pc.c
+++ b/tests/qtest/libqos/pci-pc.c
@@ -186,7 +186,7 @@ void qpci_unplug_acpi_device_test(QTestState *qts, const char *id, uint8_t slot)
g_assert(!qdict_haskey(response, "error"));
qobject_unref(response);
- qtest_outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
+ qtest_outl(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
qtest_qmp_eventwait(qts, "DEVICE_DELETED");
}
--
2.26.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH] libqos: pci-pc: use 32-bit write for EJ register
2020-06-23 16:18 [PATCH] libqos: pci-pc: use 32-bit write for EJ register Paolo Bonzini
@ 2020-06-23 20:55 ` Michael S. Tsirkin
2020-06-24 5:59 ` Paolo Bonzini
2020-06-24 7:46 ` Thomas Huth
1 sibling, 1 reply; 5+ messages in thread
From: Michael S. Tsirkin @ 2020-06-23 20:55 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: thuth, qemu-devel, kraxel
On Tue, Jun 23, 2020 at 12:18:51PM -0400, Paolo Bonzini wrote:
> The memory region ops have min_access_size == 4 so obey it.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
I assume you are queueing this with the memory core change?
> ---
> tests/qtest/libqos/pci-pc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/qtest/libqos/pci-pc.c b/tests/qtest/libqos/pci-pc.c
> index 0bc591d1da..3bb2eb3ba8 100644
> --- a/tests/qtest/libqos/pci-pc.c
> +++ b/tests/qtest/libqos/pci-pc.c
> @@ -186,7 +186,7 @@ void qpci_unplug_acpi_device_test(QTestState *qts, const char *id, uint8_t slot)
> g_assert(!qdict_haskey(response, "error"));
> qobject_unref(response);
>
> - qtest_outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
> + qtest_outl(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
>
> qtest_qmp_eventwait(qts, "DEVICE_DELETED");
> }
> --
> 2.26.2
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] libqos: pci-pc: use 32-bit write for EJ register
2020-06-23 20:55 ` Michael S. Tsirkin
@ 2020-06-24 5:59 ` Paolo Bonzini
0 siblings, 0 replies; 5+ messages in thread
From: Paolo Bonzini @ 2020-06-24 5:59 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: thuth, qemu-devel, kraxel
On 23/06/20 22:55, Michael S. Tsirkin wrote:
> On Tue, Jun 23, 2020 at 12:18:51PM -0400, Paolo Bonzini wrote:
>> The memory region ops have min_access_size == 4 so obey it.
>>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
>
> I assume you are queueing this with the memory core change?
Yes, I am.
>
>> ---
>> tests/qtest/libqos/pci-pc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/tests/qtest/libqos/pci-pc.c b/tests/qtest/libqos/pci-pc.c
>> index 0bc591d1da..3bb2eb3ba8 100644
>> --- a/tests/qtest/libqos/pci-pc.c
>> +++ b/tests/qtest/libqos/pci-pc.c
>> @@ -186,7 +186,7 @@ void qpci_unplug_acpi_device_test(QTestState *qts, const char *id, uint8_t slot)
>> g_assert(!qdict_haskey(response, "error"));
>> qobject_unref(response);
>>
>> - qtest_outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
>> + qtest_outl(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
>>
>> qtest_qmp_eventwait(qts, "DEVICE_DELETED");
>> }
>> --
>> 2.26.2
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] libqos: pci-pc: use 32-bit write for EJ register
2020-06-23 16:18 [PATCH] libqos: pci-pc: use 32-bit write for EJ register Paolo Bonzini
2020-06-23 20:55 ` Michael S. Tsirkin
@ 2020-06-24 7:46 ` Thomas Huth
2020-06-24 8:00 ` Paolo Bonzini
1 sibling, 1 reply; 5+ messages in thread
From: Thomas Huth @ 2020-06-24 7:46 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel; +Cc: kraxel, mst
On 23/06/2020 18.18, Paolo Bonzini wrote:
> The memory region ops have min_access_size == 4 so obey it.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> tests/qtest/libqos/pci-pc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/qtest/libqos/pci-pc.c b/tests/qtest/libqos/pci-pc.c
> index 0bc591d1da..3bb2eb3ba8 100644
> --- a/tests/qtest/libqos/pci-pc.c
> +++ b/tests/qtest/libqos/pci-pc.c
> @@ -186,7 +186,7 @@ void qpci_unplug_acpi_device_test(QTestState *qts, const char *id, uint8_t slot)
> g_assert(!qdict_haskey(response, "error"));
> qobject_unref(response);
>
> - qtest_outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
> + qtest_outl(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
>
> qtest_qmp_eventwait(qts, "DEVICE_DELETED");
> }
I was a little bit afraid that this could cause endianess issues on big
endian hosts, but I gave it a try on a s390x machine and it seems to
work fine.
Tested-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] libqos: pci-pc: use 32-bit write for EJ register
2020-06-24 7:46 ` Thomas Huth
@ 2020-06-24 8:00 ` Paolo Bonzini
0 siblings, 0 replies; 5+ messages in thread
From: Paolo Bonzini @ 2020-06-24 8:00 UTC (permalink / raw)
To: Thomas Huth, qemu-devel; +Cc: kraxel, mst
On 24/06/20 09:46, Thomas Huth wrote:
> On 23/06/2020 18.18, Paolo Bonzini wrote:
>> The memory region ops have min_access_size == 4 so obey it.
>>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>> ---
>> tests/qtest/libqos/pci-pc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/tests/qtest/libqos/pci-pc.c b/tests/qtest/libqos/pci-pc.c
>> index 0bc591d1da..3bb2eb3ba8 100644
>> --- a/tests/qtest/libqos/pci-pc.c
>> +++ b/tests/qtest/libqos/pci-pc.c
>> @@ -186,7 +186,7 @@ void qpci_unplug_acpi_device_test(QTestState *qts,
>> const char *id, uint8_t slot)
>> g_assert(!qdict_haskey(response, "error"));
>> qobject_unref(response);
>> - qtest_outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
>> + qtest_outl(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
>> qtest_qmp_eventwait(qts, "DEVICE_DELETED");
>> }
>
> I was a little bit afraid that this could cause endianess issues on big
> endian hosts, but I gave it a try on a s390x machine and it seems to
> work fine.
>
> Tested-by: Thomas Huth <thuth@redhat.com>
Also because this is "pci-pc.c". :)) But seriously: if anything this
would fix big endian bugs, not break them.
Paolo
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-06-24 8:04 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2020-06-23 16:18 [PATCH] libqos: pci-pc: use 32-bit write for EJ register Paolo Bonzini
2020-06-23 20:55 ` Michael S. Tsirkin
2020-06-24 5:59 ` Paolo Bonzini
2020-06-24 7:46 ` Thomas Huth
2020-06-24 8:00 ` Paolo Bonzini
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