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From: Kevin O'Connor <kevin@koconnor.net>
To: Roman Bolshakov <r.bolshakov@yadro.com>
Cc: seabios@seabios.org, "Philippe Mathieu-Daudé" <philmd@redhat.com>,
	qemu-devel@nongnu.org
Subject: Re: [PATCH] timer: Handle decrements of PIT counter
Date: Tue, 23 Jun 2020 23:00:24 -0400	[thread overview]
Message-ID: <20200624030024.GA885327@morn.lan> (raw)
In-Reply-To: <20200613111911.65497-1-r.bolshakov@yadro.com>

On Sat, Jun 13, 2020 at 02:19:12PM +0300, Roman Bolshakov wrote:
> There's a fallback to PIT if TSC is not present but it doesn't work
> properly. It prevents boot from floppy on isapc and 486 cpu [1][2].
> 
> SeaBIOS configures PIT in Mode 2. PIT counter is decremented in the mode
> but timer_adjust_bits() thinks that the counter overflows and increases
> 32-bit tick counter on each detected "overflow". Invalid overflow
> detection results in 55ms time advance (1 / 18.2Hz) on each read from
> PIT counter. So all timers expire much faster and 5-second floppy
> timeout expires in 83 real microseconds (or just a bit longer).
> 
> Provide counter direction to timer_adjust_bits() and normalize the
> counter to advance ticks in monotonically increasing TimerLast.

Good catch.  Could we fix it using the patch below instead though?

-Kevin


--- a/src/hw/timer.c
+++ b/src/hw/timer.c
@@ -180,7 +180,7 @@ timer_read(void)
     // Read from PIT.
     outb(PM_SEL_READBACK | PM_READ_VALUE | PM_READ_COUNTER0, PORT_PIT_MODE);
     u16 v = inb(PORT_PIT_COUNTER0) | (inb(PORT_PIT_COUNTER0) << 8);
-    return timer_adjust_bits(v, 0xffff);
+    return timer_adjust_bits(-v, 0xffff);
 }
 
 // Return the TSC value that is 'msecs' time in the future.


  reply	other threads:[~2020-06-24  3:01 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-13 11:19 [PATCH] timer: Handle decrements of PIT counter Roman Bolshakov
2020-06-24  3:00 ` Kevin O'Connor [this message]
2020-06-26 13:09   ` Roman Bolshakov
2020-06-26 14:09     ` Kevin O'Connor

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