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* [PULL 0/4] target/xtensa fixes
@ 2020-06-25  8:11 Max Filippov
  2020-06-26  8:28 ` Peter Maydell
  0 siblings, 1 reply; 2+ messages in thread
From: Max Filippov @ 2020-06-25  8:11 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, Max Filippov

Hi Peter,

please pull the following batch of fixes for the target/xtensa.

The following changes since commit 648db19685b7030aa558a4ddbd3a8e53d8c9a062:

  Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-04-29' into staging (2020-04-29 15:07:33 +0100)

are available in the Git repository at:

  git://github.com/OSLL/qemu-xtensa.git tags/20200625-xtensa

for you to fetch changes up to 8a3a81478dcc592518069125a6ad271fe5511b95:

  target/xtensa: drop gen_io_end call (2020-06-22 03:38:30 -0700)

----------------------------------------------------------------
target/xtensa fixes for 5.1:

- fix access to special registers missing in the core configuration;
- fix simcall opcode behavior for new hardware;
- drop gen_io_end call from xtensa translator.

----------------------------------------------------------------
Max Filippov (4):
      target/xtensa: work around missing SR definitions
      target/xtensa: fetch HW version from configuration overlay
      target/xtensa: fix simcall for newer hardware
      target/xtensa: drop gen_io_end call

 target/xtensa/cpu.h          |  1 +
 target/xtensa/overlay_tool.h |  8 +++---
 target/xtensa/translate.c    | 60 +++++++++++++++++++++++++++++---------------
 3 files changed, 46 insertions(+), 23 deletions(-)

-- 
Thanks.
-- Max


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