From: David Gibson <david@gibson.dropbear.id.au>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-ppc@nongnu.org, Lijun Pan <ljp@linux.vnet.ibm.com>,
Lijun Pan <ljp@linux.ibm.com>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v3 8/8] target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions
Date: Fri, 26 Jun 2020 14:31:14 +1000 [thread overview]
Message-ID: <20200626043114.GJ172395@umbus.fritz.box> (raw)
In-Reply-To: <0095b0c7-ae6d-7a09-98b2-bf830b566186@linaro.org>
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On Thu, Jun 25, 2020 at 08:53:54PM -0700, Richard Henderson wrote:
> On 6/25/20 2:15 PM, Lijun Pan wrote:
> >
> >
> >> On Jun 25, 2020, at 1:37 PM, Richard Henderson <richard.henderson@linaro.org> wrote:
> >>
> >> On 6/25/20 10:00 AM, Lijun Pan wrote:
> >>> +#define VDIV_MOD_DO(name, op, element, sign, bit) \
> >>> + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
> >>> + { \
> >>> + int i; \
> >>> + \
> >>> + \
> >>> + for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
> >>> + if (unlikely((b->element[i] == 0) || \
> >>> + (sign && \
> >>> + (b->element[i] == UINT##bit##_MAX) && \
> >>> + (a->element[i] == INT##bit##_MIN)))) \
> >>> + continue; \
> >>> + r->element[i] = a->element[i] op b->element[i]; \
> >>> + } \
> >>> + }
> >>
> >> Missing braces for the if. Extra blank line before the for.
> >
> > No, the braces are enough.
>
> No they are not. See CODING_STYLE.rst.
I suspect there is some confusion in terms here.
Lijun, what Richard is saying is that the qemu coding style requires
braces { } around if blocks, even if they're a single statement. Your
response seemed to be discussing the brackets ( ) which are fine.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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prev parent reply other threads:[~2020-06-26 4:32 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-25 17:00 [PATCH v3 0/8] Add several Power ISA 3.1 32/64-bit vector instructions Lijun Pan
2020-06-25 17:00 ` [PATCH v3 1/8] target/ppc: Introduce Power ISA 3.1 flag Lijun Pan
2020-06-25 17:40 ` Richard Henderson
2020-06-25 21:12 ` Lijun Pan
2020-06-26 3:40 ` Richard Henderson
2020-06-25 17:00 ` [PATCH v3 2/8] target/ppc: add byte-reverse br[dwh] instructions Lijun Pan
2020-06-25 17:42 ` Richard Henderson
2020-06-25 21:13 ` Lijun Pan
2020-06-25 17:00 ` [PATCH v3 3/8] target/ppc: convert vmuluwm to tcg_gen_gvec_mul Lijun Pan
2020-06-25 17:52 ` Richard Henderson
2020-06-25 17:00 ` [PATCH v3 4/8] target/ppc: add vmulld instruction Lijun Pan
2020-06-25 18:25 ` Richard Henderson
2020-06-25 21:13 ` Lijun Pan
2020-06-26 3:52 ` Richard Henderson
2020-06-25 17:00 ` [PATCH v3 5/8] target/ppc: add vmulh{su}w instructions Lijun Pan
2020-06-25 18:26 ` Richard Henderson
2020-06-25 17:00 ` [PATCH v3 6/8] fix the prototype of muls64/mulu64 Lijun Pan
2020-06-25 18:28 ` Richard Henderson
2020-06-25 17:00 ` [PATCH v3 7/8] target/ppc: add vmulh{su}d instructions Lijun Pan
2020-06-25 18:32 ` Richard Henderson
2020-06-25 17:00 ` [PATCH v3 8/8] target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions Lijun Pan
2020-06-25 18:37 ` Richard Henderson
2020-06-25 21:15 ` Lijun Pan
2020-06-26 3:53 ` Richard Henderson
2020-06-26 4:31 ` David Gibson [this message]
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