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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org, Yunqiang Su <ysu@wavecomp.com>,
	Aurelien Jarno <aurelien@aurel32.net>
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	qemu-trivial@nongnu.org, "Laurent Vivier" <laurent@vivier.eu>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH v3 5/5] hw/mips/malta: Verify malta-strict machine uses correct DIMM sizes
Date: Tue, 30 Jun 2020 21:57:23 +0200	[thread overview]
Message-ID: <20200630195723.1359-6-f4bug@amsat.org> (raw)
In-Reply-To: <20200630195723.1359-1-f4bug@amsat.org>

The machine has 4 DIMM slots. Each DIMM must be a power of 2.
Add a check the total RAM is a good combination of DIMMs.

Example when asking a combination not power of 2:

  $ qemu-system-mips -M malta-strict -bios /dev/null -m 252
  qemu-system-mips: RAM size must be the combination of 4 powers of 2

Working example (as 100 = 64 + 32 + 2 + 2):

  $ qemu-system-mips -M malta-strict -monitor stdio -S -bios /dev/null -m 100
  QEMU 5.0.50 monitor - type 'help' for more information
  (qemu) info mtree
  address-space: memory
    0000000000000000-ffffffffffffffff (prio 0, i/o): system
      0000000000000000-00000000063fffff (prio 0, ram): alias mips_malta_low_preio.ram @mips_malta.ram 0000000000000000-00000000063fffff

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/mips/malta.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index ac4a618751..17f5833a94 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -71,6 +71,8 @@
 
 #define MAX_IDE_BUS         2
 
+#define DIMM_SLOTS_COUNT    4
+
 #define TYPE_MALTA_MACHINE       MACHINE_TYPE_NAME("malta-base")
 #define MALTA_MACHINE_CLASS(klass) \
      OBJECT_CLASS_CHECK(MaltaMachineClass, (klass), TYPE_MALTA_MACHINE)
@@ -82,6 +84,7 @@ typedef struct MaltaMachineClass {
     MachineClass parent_obj;
     /* Public */
     ram_addr_t max_ramsize;
+    bool verify_dimm_sizes;
 } MaltaMachineClass;
 
 typedef struct {
@@ -1260,6 +1263,12 @@ void mips_malta_init(MachineState *machine)
     /* create CPU */
     mips_create_cpu(machine, s, &cbus_irq, &i8259_irq);
 
+    if (mmc->verify_dimm_sizes && ctpop64(ram_size) > DIMM_SLOTS_COUNT) {
+        error_report("RAM size must be the combination of %d powers of 2",
+                     DIMM_SLOTS_COUNT);
+        exit(1);
+    }
+
     /*
      * The GT-64120A north bridge accepts at most 256 MiB per SCS for
      * address decoding, so we have a maximum of 1 GiB. We deliberately
@@ -1493,6 +1502,7 @@ static void malta_machine_strict_class_init(ObjectClass *oc, void *data)
 #endif
     mc->default_ram_size = 32 * MiB;
     mmc->max_ramsize = 256 * MiB; /* 32 MByte PC100 SDRAM DIMMs x 4 slots */
+    mmc->verify_dimm_sizes = true;
 };
 
 static const TypeInfo malta_machine_types[] = {
-- 
2.21.3



  parent reply	other threads:[~2020-06-30 20:03 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-30 19:57 [PATCH v3 0/5] hw/mips/malta: Add the 'malta-strict' machine, matching Malta hardware Philippe Mathieu-Daudé
2020-06-30 19:57 ` [PATCH v3 1/5] hw/mips/malta: Trivial code movement Philippe Mathieu-Daudé
2020-06-30 19:57 ` [PATCH v3 2/5] hw/mips/malta: Register the machine as a TypeInfo Philippe Mathieu-Daudé
2020-06-30 19:57 ` [PATCH v3 3/5] hw/mips/malta: Introduce MaltaMachineClass::max_ramsize Philippe Mathieu-Daudé
2020-06-30 19:57 ` [PATCH v3 4/5] hw/mips/malta: Introduce the 'malta-strict' machine Philippe Mathieu-Daudé
2020-06-30 19:57 ` Philippe Mathieu-Daudé [this message]
2020-06-30 21:54 ` [PATCH v3 0/5] hw/mips/malta: Add the 'malta-strict' machine, matching Malta hardware Aleksandar Markovic
2020-07-01  1:13   ` BALATON Zoltan
2020-07-01 17:39   ` Aurelien Jarno
2020-07-01 18:51     ` Aleksandar Markovic
2020-07-01 21:17       ` Aurelien Jarno
2020-07-02  7:45         ` Thomas Huth
2020-07-01  1:35 ` Jiaxun Yang

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