* [PATCH] tcg: Fix do_nonatomic_op_* vs signed operations
@ 2020-07-01 16:56 Richard Henderson
2020-07-01 23:47 ` LIU Zhiwei
2020-07-02 21:46 ` Alistair Francis
0 siblings, 2 replies; 3+ messages in thread
From: Richard Henderson @ 2020-07-01 16:56 UTC (permalink / raw)
To: qemu-devel; +Cc: Alistair.Francis, zhiwei_liu
The smin/smax/umin/umax operations require the operands to be
properly sign extended. Do not drop the MO_SIGN bit from the
load, and additionally extend the val input.
Reported-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg-op.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index e60b74fb82..4b8a473fad 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -3189,8 +3189,9 @@ static void do_nonatomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val,
memop = tcg_canonicalize_memop(memop, 0, 0);
- tcg_gen_qemu_ld_i32(t1, addr, idx, memop & ~MO_SIGN);
- gen(t2, t1, val);
+ tcg_gen_qemu_ld_i32(t1, addr, idx, memop);
+ tcg_gen_ext_i32(t2, val, memop);
+ gen(t2, t1, t2);
tcg_gen_qemu_st_i32(t2, addr, idx, memop);
tcg_gen_ext_i32(ret, (new_val ? t2 : t1), memop);
@@ -3232,8 +3233,9 @@ static void do_nonatomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val,
memop = tcg_canonicalize_memop(memop, 1, 0);
- tcg_gen_qemu_ld_i64(t1, addr, idx, memop & ~MO_SIGN);
- gen(t2, t1, val);
+ tcg_gen_qemu_ld_i64(t1, addr, idx, memop);
+ tcg_gen_ext_i64(t2, val, memop);
+ gen(t2, t1, t2);
tcg_gen_qemu_st_i64(t2, addr, idx, memop);
tcg_gen_ext_i64(ret, (new_val ? t2 : t1), memop);
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] tcg: Fix do_nonatomic_op_* vs signed operations
2020-07-01 16:56 [PATCH] tcg: Fix do_nonatomic_op_* vs signed operations Richard Henderson
@ 2020-07-01 23:47 ` LIU Zhiwei
2020-07-02 21:46 ` Alistair Francis
1 sibling, 0 replies; 3+ messages in thread
From: LIU Zhiwei @ 2020-07-01 23:47 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: Alistair.Francis
On 2020/7/2 0:56, Richard Henderson wrote:
> The smin/smax/umin/umax operations require the operands to be
> properly sign extended. Do not drop the MO_SIGN bit from the
> load, and additionally extend the val input.
>
> Reported-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/tcg-op.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
> index e60b74fb82..4b8a473fad 100644
> --- a/tcg/tcg-op.c
> +++ b/tcg/tcg-op.c
> @@ -3189,8 +3189,9 @@ static void do_nonatomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val,
>
> memop = tcg_canonicalize_memop(memop, 0, 0);
>
> - tcg_gen_qemu_ld_i32(t1, addr, idx, memop & ~MO_SIGN);
> - gen(t2, t1, val);
> + tcg_gen_qemu_ld_i32(t1, addr, idx, memop);
> + tcg_gen_ext_i32(t2, val, memop);
> + gen(t2, t1, t2);
> tcg_gen_qemu_st_i32(t2, addr, idx, memop);
>
> tcg_gen_ext_i32(ret, (new_val ? t2 : t1), memop);
> @@ -3232,8 +3233,9 @@ static void do_nonatomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val,
>
> memop = tcg_canonicalize_memop(memop, 1, 0);
>
> - tcg_gen_qemu_ld_i64(t1, addr, idx, memop & ~MO_SIGN);
> - gen(t2, t1, val);
> + tcg_gen_qemu_ld_i64(t1, addr, idx, memop);
> + tcg_gen_ext_i64(t2, val, memop);
> + gen(t2, t1, t2);
> tcg_gen_qemu_st_i64(t2, addr, idx, memop);
>
> tcg_gen_ext_i64(ret, (new_val ? t2 : t1), memop);
Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Zhiwei
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] tcg: Fix do_nonatomic_op_* vs signed operations
2020-07-01 16:56 [PATCH] tcg: Fix do_nonatomic_op_* vs signed operations Richard Henderson
2020-07-01 23:47 ` LIU Zhiwei
@ 2020-07-02 21:46 ` Alistair Francis
1 sibling, 0 replies; 3+ messages in thread
From: Alistair Francis @ 2020-07-02 21:46 UTC (permalink / raw)
To: Richard Henderson
Cc: Alistair Francis, qemu-devel@nongnu.org Developers, liuzhiwei
On Wed, Jul 1, 2020 at 10:00 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The smin/smax/umin/umax operations require the operands to be
> properly sign extended. Do not drop the MO_SIGN bit from the
> load, and additionally extend the val input.
>
> Reported-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Applied to riscv-to-apply.next
Alistair
> ---
> tcg/tcg-op.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
> index e60b74fb82..4b8a473fad 100644
> --- a/tcg/tcg-op.c
> +++ b/tcg/tcg-op.c
> @@ -3189,8 +3189,9 @@ static void do_nonatomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val,
>
> memop = tcg_canonicalize_memop(memop, 0, 0);
>
> - tcg_gen_qemu_ld_i32(t1, addr, idx, memop & ~MO_SIGN);
> - gen(t2, t1, val);
> + tcg_gen_qemu_ld_i32(t1, addr, idx, memop);
> + tcg_gen_ext_i32(t2, val, memop);
> + gen(t2, t1, t2);
> tcg_gen_qemu_st_i32(t2, addr, idx, memop);
>
> tcg_gen_ext_i32(ret, (new_val ? t2 : t1), memop);
> @@ -3232,8 +3233,9 @@ static void do_nonatomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val,
>
> memop = tcg_canonicalize_memop(memop, 1, 0);
>
> - tcg_gen_qemu_ld_i64(t1, addr, idx, memop & ~MO_SIGN);
> - gen(t2, t1, val);
> + tcg_gen_qemu_ld_i64(t1, addr, idx, memop);
> + tcg_gen_ext_i64(t2, val, memop);
> + gen(t2, t1, t2);
> tcg_gen_qemu_st_i64(t2, addr, idx, memop);
>
> tcg_gen_ext_i64(ret, (new_val ? t2 : t1), memop);
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-07-02 21:56 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-07-01 16:56 [PATCH] tcg: Fix do_nonatomic_op_* vs signed operations Richard Henderson
2020-07-01 23:47 ` LIU Zhiwei
2020-07-02 21:46 ` Alistair Francis
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).