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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 01/34] Add a phy-num property to the i.MX FEC emulator
Date: Fri,  3 Jul 2020 17:53:32 +0100	[thread overview]
Message-ID: <20200703165405.17672-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200703165405.17672-1-peter.maydell@linaro.org>

From: Jean-Christophe Dubois <jcd@tribudubois.net>

We need a solution to use an Ethernet PHY that is not the first device
on the MDIO bus (device 0 on MDIO bus).

As an example with the i.MX6UL the NXP SOC has 2 Ethernet devices but
only one MDIO bus on which the 2 related PHY are connected but at unique
addresses.

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: a1a5c0e139d1c763194b8020573dcb6025daeefa.1593296112.git.jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/net/imx_fec.h |  1 +
 hw/net/imx_fec.c         | 24 +++++++++++++++++-------
 hw/net/trace-events      |  4 ++--
 3 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/include/hw/net/imx_fec.h b/include/hw/net/imx_fec.h
index 7b3faa40194..9f03034b893 100644
--- a/include/hw/net/imx_fec.h
+++ b/include/hw/net/imx_fec.h
@@ -268,6 +268,7 @@ typedef struct IMXFECState {
     uint32_t phy_advertise;
     uint32_t phy_int;
     uint32_t phy_int_mask;
+    uint32_t phy_num;
 
     bool is_fec;
 
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index eefedc252de..2c148040414 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -280,12 +280,16 @@ static void imx_phy_reset(IMXFECState *s)
 static uint32_t imx_phy_read(IMXFECState *s, int reg)
 {
     uint32_t val;
+    uint32_t phy = reg / 32;
 
-    if (reg > 31) {
-        /* we only advertise one phy */
+    if (phy != s->phy_num) {
+        qemu_log_mask(LOG_GUEST_ERROR, "[%s.phy]%s: Bad phy num %u\n",
+                      TYPE_IMX_FEC, __func__, phy);
         return 0;
     }
 
+    reg %= 32;
+
     switch (reg) {
     case 0:     /* Basic Control */
         val = s->phy_control;
@@ -331,20 +335,25 @@ static uint32_t imx_phy_read(IMXFECState *s, int reg)
         break;
     }
 
-    trace_imx_phy_read(val, reg);
+    trace_imx_phy_read(val, phy, reg);
 
     return val;
 }
 
 static void imx_phy_write(IMXFECState *s, int reg, uint32_t val)
 {
-    trace_imx_phy_write(val, reg);
+    uint32_t phy = reg / 32;
 
-    if (reg > 31) {
-        /* we only advertise one phy */
+    if (phy != s->phy_num) {
+        qemu_log_mask(LOG_GUEST_ERROR, "[%s.phy]%s: Bad phy num %u\n",
+                      TYPE_IMX_FEC, __func__, phy);
         return;
     }
 
+    reg %= 32;
+
+    trace_imx_phy_write(val, phy, reg);
+
     switch (reg) {
     case 0:     /* Basic Control */
         if (val & 0x8000) {
@@ -926,7 +935,7 @@ static void imx_eth_write(void *opaque, hwaddr offset, uint64_t value,
                                                        extract32(value,
                                                                  18, 10)));
         } else {
-            /* This a write operation */
+            /* This is a write operation */
             imx_phy_write(s, extract32(value, 18, 10), extract32(value, 0, 16));
         }
         /* raise the interrupt as the PHY operation is done */
@@ -1315,6 +1324,7 @@ static void imx_eth_realize(DeviceState *dev, Error **errp)
 static Property imx_eth_properties[] = {
     DEFINE_NIC_PROPERTIES(IMXFECState, conf),
     DEFINE_PROP_UINT32("tx-ring-num", IMXFECState, tx_ring_num, 1),
+    DEFINE_PROP_UINT32("phy-num", IMXFECState, phy_num, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/hw/net/trace-events b/hw/net/trace-events
index e6875c4c0f6..5db45456d92 100644
--- a/hw/net/trace-events
+++ b/hw/net/trace-events
@@ -413,8 +413,8 @@ i82596_set_multicast(uint16_t count) "Added %d multicast entries"
 i82596_channel_attention(void *s) "%p: Received CHANNEL ATTENTION"
 
 # imx_fec.c
-imx_phy_read(uint32_t val, int reg) "0x%04"PRIx32" <= reg[%d]"
-imx_phy_write(uint32_t val, int reg) "0x%04"PRIx32" => reg[%d]"
+imx_phy_read(uint32_t val, int phy, int reg) "0x%04"PRIx32" <= phy[%d].reg[%d]"
+imx_phy_write(uint32_t val, int phy, int reg) "0x%04"PRIx32" => phy[%d].reg[%d]"
 imx_phy_update_link(const char *s) "%s"
 imx_phy_reset(void) ""
 imx_fec_read_bd(uint64_t addr, int flags, int len, int data) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x"
-- 
2.20.1



  reply	other threads:[~2020-07-03 16:55 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-03 16:53 [PULL 00/34] target-arm queue Peter Maydell
2020-07-03 16:53 ` Peter Maydell [this message]
2020-07-03 16:53 ` [PULL 02/34] Add the ability to select a different PHY for each i.MX6UL FEC interface Peter Maydell
2020-07-03 16:53 ` [PULL 03/34] Select MDIO device 2 and 1 as PHY devices for i.MX6UL EVK board Peter Maydell
2020-07-03 16:53 ` [PULL 04/34] qdev: Introduce DEFINE_PROP_RESERVED_REGION Peter Maydell
2020-07-03 16:53 ` [PULL 05/34] virtio-iommu: Implement RESV_MEM probe request Peter Maydell
2020-07-05 18:21   ` Peter Maydell
2020-07-08 14:40     ` Auger Eric
2020-07-03 16:53 ` [PULL 06/34] virtio-iommu: Handle reserved regions in the translation process Peter Maydell
2020-07-03 16:53 ` [PULL 07/34] virtio-iommu-pci: Add array of Interval properties Peter Maydell
2020-07-03 16:53 ` [PULL 08/34] hw/arm/virt: Let the virtio-iommu bypass MSIs Peter Maydell
2023-02-02 10:47   ` Philippe Mathieu-Daudé
2023-02-02 10:52     ` Philippe Mathieu-Daudé
2023-02-02 10:58     ` Peter Maydell
2023-02-02 11:07       ` Philippe Mathieu-Daudé
2023-02-02 13:06       ` Eric Auger
2020-07-03 16:53 ` [PULL 09/34] target/arm: kvm: Handle DABT with no valid ISS Peter Maydell
2020-07-03 16:53 ` [PULL 10/34] target/arm: kvm: Handle misconfigured dabt injection Peter Maydell
2020-07-03 16:53 ` [PULL 11/34] tests/acpi: remove stale allowed tables Peter Maydell
2020-07-03 16:53 ` [PULL 12/34] tests/acpi: virt: allow DSDT acpi table changes Peter Maydell
2020-07-03 16:53 ` [PULL 13/34] hw/arm/virt-acpi-build: Only expose flash on older machine types Peter Maydell
2020-07-03 16:53 ` [PULL 14/34] tests/acpi: virt: update golden masters for DSDT Peter Maydell
2020-07-03 16:53 ` [PULL 15/34] target/arm: Fix temp double-free in sve ldr/str Peter Maydell
2020-07-03 16:53 ` [PULL 16/34] hw/display/bcm2835_fb.c: Initialize all fields of struct Peter Maydell
2020-07-03 16:53 ` [PULL 17/34] hw/arm/spitz: Detabify Peter Maydell
2020-07-03 16:53 ` [PULL 18/34] hw/arm/spitz: Create SpitzMachineClass abstract base class Peter Maydell
2020-07-03 16:53 ` [PULL 19/34] hw/arm/spitz: Keep pointers to MPU and SSI devices in SpitzMachineState Peter Maydell
2020-07-03 16:53 ` [PULL 20/34] hw/arm/spitz: Keep pointers to scp0, scp1 " Peter Maydell
2020-07-03 16:53 ` [PULL 21/34] hw/arm/spitz: Implement inbound GPIO lines for bit5 and power signals Peter Maydell
2020-07-03 16:53 ` [PULL 22/34] hw/misc/max111x: provide QOM properties for setting initial values Peter Maydell
2020-07-03 16:53 ` [PULL 23/34] hw/misc/max111x: Don't use vmstate_register() Peter Maydell
2020-07-03 16:53 ` [PULL 24/34] ssi: Add ssi_realize_and_unref() Peter Maydell
2020-07-03 16:53 ` [PULL 25/34] hw/arm/spitz: Use max111x properties to set initial values Peter Maydell
2020-07-03 16:53 ` [PULL 26/34] hw/misc/max111x: Use GPIO lines rather than max111x_set_input() Peter Maydell
2020-07-03 16:53 ` [PULL 27/34] hw/misc/max111x: Create header file for documentation, TYPE_ macros Peter Maydell
2020-07-03 16:53 ` [PULL 28/34] hw/arm/spitz: Encapsulate misc GPIO handling in a device Peter Maydell
2020-07-03 16:54 ` [PULL 29/34] hw/gpio/zaurus.c: Use LOG_GUEST_ERROR for bad guest register accesses Peter Maydell
2020-07-03 16:54 ` [PULL 30/34] hw/arm/spitz: " Peter Maydell
2020-07-03 16:54 ` [PULL 31/34] hw/arm/pxa2xx_pic: " Peter Maydell
2020-07-03 16:54 ` [PULL 32/34] hw/arm/spitz: Provide usual QOM macros for corgi-ssp and spitz-lcdtg Peter Maydell
2020-07-03 16:54 ` [PULL 33/34] Replace uses of FROM_SSI_SLAVE() macro with QOM casts Peter Maydell
2020-07-03 16:54 ` [PULL 34/34] Deprecate TileGX port Peter Maydell
2020-07-03 17:50 ` [PULL 00/34] target-arm queue no-reply
2020-07-04 17:43 ` Peter Maydell

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