From: David Gibson <david@gibson.dropbear.id.au>
To: Lijun Pan <ljp@linux.ibm.com>
Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v4 00/11] Add several Power ISA 3.1 32/64-bit vector instructions
Date: Sun, 5 Jul 2020 19:10:46 +1000 [thread overview]
Message-ID: <20200705091046.GE12576@umbus.fritz.box> (raw)
In-Reply-To: <20200701234344.91843-1-ljp@linux.ibm.com>
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On Wed, Jul 01, 2020 at 06:43:35PM -0500, Lijun Pan wrote:
> This patch series add several newly introduced 32/64-bit vector
> instructions in Power ISA 3.1. Power ISA 3.1 flag is introduced in
> this version. In v4 version, coding style issues are fixed, community
> reviews/suggestions are taken into consideration.
So, is the ISA 3.1 document available somewhere?
>
> Lijun Pan (11):
> target/ppc: Introduce Power ISA 3.1 flag
> target/ppc: Enable Power ISA 3.1
> target/ppc: add byte-reverse br[dwh] instructions
> target/ppc: convert vmuluwm to tcg_gen_gvec_mul
> target/ppc: add vmulld instruction
> Update PowerPC AT_HWCAP2 definition
> target/ppc: add vmulld to INDEX_op_mul_vec case
> target/ppc: add vmulh{su}w instructions
> fix the prototype of muls64/mulu64
> target/ppc: add vmulh{su}d instructions
> target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions
>
> include/elf.h | 1 +
> include/qemu/host-utils.h | 4 +-
> target/ppc/cpu.h | 4 +-
> target/ppc/helper.h | 13 ++++-
> target/ppc/int_helper.c | 75 ++++++++++++++++++++++++-----
> target/ppc/translate.c | 43 +++++++++++++++++
> target/ppc/translate/vmx-impl.inc.c | 26 +++++++++-
> target/ppc/translate/vmx-ops.inc.c | 27 +++++++++--
> target/ppc/translate_init.inc.c | 2 +-
> tcg/ppc/tcg-target.h | 2 +
> tcg/ppc/tcg-target.inc.c | 12 ++++-
> 11 files changed, 184 insertions(+), 25 deletions(-)
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2020-07-05 9:32 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-01 23:43 [PATCH v4 00/11] Add several Power ISA 3.1 32/64-bit vector instructions Lijun Pan
2020-07-01 23:43 ` [PATCH v4 01/11] target/ppc: Introduce Power ISA 3.1 flag Lijun Pan
2020-07-05 9:07 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 02/11] target/ppc: Enable Power ISA 3.1 Lijun Pan
2020-07-05 9:08 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 03/11] target/ppc: add byte-reverse br[dwh] instructions Lijun Pan
2020-07-07 10:30 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 04/11] target/ppc: convert vmuluwm to tcg_gen_gvec_mul Lijun Pan
2020-07-08 12:22 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 05/11] target/ppc: add vmulld instruction Lijun Pan
2020-07-13 5:11 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 06/11] Update PowerPC AT_HWCAP2 definition Lijun Pan
2020-07-13 5:14 ` David Gibson
2020-07-13 19:20 ` Lijun Pan
2020-07-13 23:47 ` David Gibson
2020-07-14 20:28 ` Lijun Pan
2020-07-01 23:43 ` [PATCH v4 07/11] target/ppc: add vmulld to INDEX_op_mul_vec case Lijun Pan
2020-07-13 19:40 ` Lijun Pan
2020-07-01 23:43 ` [PATCH v4 08/11] target/ppc: add vmulh{su}w instructions Lijun Pan
2020-07-13 19:35 ` Lijun Pan
2020-07-01 23:43 ` [PATCH v4 09/11] fix the prototype of muls64/mulu64 Lijun Pan
2020-07-06 16:14 ` Laurent Vivier
2020-07-05 9:10 ` David Gibson [this message]
2020-07-06 7:34 ` [PATCH v4 00/11] Add several Power ISA 3.1 32/64-bit vector instructions Greg Kurz
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