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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Sarah Harris" <S.E.Harris@kent.ac.uk>,
	"Thomas Huth" <huth@tuxfamily.org>,
	"Joaquin de Andres" <me@xcancerberox.com.ar>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Michael Rolnik" <mrolnik@gmail.com>
Subject: [PATCH v2 3/4] target/avr/disas: Fix store instructions display order
Date: Tue,  7 Jul 2020 09:00:20 +0200	[thread overview]
Message-ID: <20200707070021.10031-4-f4bug@amsat.org> (raw)
In-Reply-To: <20200707070021.10031-1-f4bug@amsat.org>

While LOAD instructions use the target register as first
argument, STORE instructions use it as second argument:

  LD Rd, X        // Rd <- (X)

  ST Y, Rd        // (Y) <- Rr

Reported-by: Joaquin de Andres <me@xcancerberox.com.ar>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/avr/disas.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/target/avr/disas.c b/target/avr/disas.c
index 23bd9919ed..7fa6e8711b 100644
--- a/target/avr/disas.c
+++ b/target/avr/disas.c
@@ -196,16 +196,16 @@ INSN(LDZ2,   "r%d, Z+", a->rd)
 INSN(LDZ3,   "r%d, -Z", a->rd)
 INSN(LDDY,   "r%d, Y+%d", a->rd, a->imm)
 INSN(LDDZ,   "r%d, Z+%d", a->rd, a->imm)
-INSN(STS,    "r%d, %d", a->rd, a->imm)
-INSN(STX1,   "r%d, X", a->rr)
-INSN(STX2,   "r%d, X+", a->rr)
-INSN(STX3,   "r%d, -X", a->rr)
-INSN(STY2,   "r%d, Y+", a->rd)
-INSN(STY3,   "r%d, -Y", a->rd)
-INSN(STZ2,   "r%d, Z+", a->rd)
-INSN(STZ3,   "r%d, -Z", a->rd)
-INSN(STDY,   "r%d, Y+%d", a->rd, a->imm)
-INSN(STDZ,   "r%d, Z+%d", a->rd, a->imm)
+INSN(STS,    "%d, r%d", a->imm, a->rd)
+INSN(STX1,   "X, r%d", a->rr)
+INSN(STX2,   "X+, r%d", a->rr)
+INSN(STX3,   "-X, r%d", a->rr)
+INSN(STY2,   "Y+, r%d", a->rd)
+INSN(STY3,   "-Y, r%d", a->rd)
+INSN(STZ2,   "Z+, r%d", a->rd)
+INSN(STZ3,   "-Z, r%d", a->rd)
+INSN(STDY,   "Y+%d, r%d", a->imm, a->rd)
+INSN(STDZ,   "Z+%d, r%d", a->imm, a->rd)
 INSN(LPM1,   "")
 INSN(LPM2,   "r%d, Z", a->rd)
 INSN(LPMX,   "r%d, Z+", a->rd)
-- 
2.21.3



  parent reply	other threads:[~2020-07-07  7:01 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-07  7:00 [PATCH v2 0/4] target/avr: Few fixes Philippe Mathieu-Daudé
2020-07-07  7:00 ` [PATCH v2 1/4] target/avr/cpu: Drop tlb_flush() in avr_cpu_reset() Philippe Mathieu-Daudé
2020-07-07  8:21   ` Thomas Huth
2020-07-07 16:34   ` Richard Henderson
2020-07-07  7:00 ` [PATCH v2 2/4] target/avr/cpu: Fix $PC displayed address Philippe Mathieu-Daudé
2020-07-07  8:22   ` Thomas Huth
2020-07-07 16:34   ` Richard Henderson
2020-07-07  7:00 ` Philippe Mathieu-Daudé [this message]
2020-07-07 16:35   ` [PATCH v2 3/4] target/avr/disas: Fix store instructions display order Richard Henderson
2020-07-07  7:00 ` [RFC PATCH v2 4/4] target/avr/translate: Fix SBRC/SBRS instructions Philippe Mathieu-Daudé
2020-07-07 16:34   ` Richard Henderson
2020-07-07 16:58     ` Philippe Mathieu-Daudé
2020-07-10 18:25       ` Richard Henderson
2020-07-07 17:58 ` [PATCH v2 0/4] target/avr: Few fixes Philippe Mathieu-Daudé

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