From: David Gibson <david@gibson.dropbear.id.au>
To: Lijun Pan <ljp@linux.vnet.ibm.com>
Cc: qemu-ppc@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>,
Lijun Pan <ljp@linux.ibm.com>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v4 06/11] Update PowerPC AT_HWCAP2 definition
Date: Tue, 14 Jul 2020 09:47:20 +1000 [thread overview]
Message-ID: <20200713234720.GF93134@umbus.fritz.box> (raw)
In-Reply-To: <BDB7FF22-BF16-45B7-B67E-94DD415A5E5C@linux.vnet.ibm.com>
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On Mon, Jul 13, 2020 at 02:20:20PM -0500, Lijun Pan wrote:
>
>
> > On Jul 13, 2020, at 12:14 AM, David Gibson <david@gibson.dropbear.id.au> wrote:
> >
> > On Wed, Jul 01, 2020 at 06:43:41PM -0500, Lijun Pan wrote:
> >> Add PPC2_FEATURE2_ARCH_3_10 to the PowerPC AT_HWCAP2 definitions.
> >>
> >> Signed-off-by: Lijun Pan <ljp@linux.ibm.com>
> >> ---
> >> v4: add missing changes, and split to 5/11, 6/11, 7/11
> >> v3: use tcg_gen_gvec_mul()
> >> v2: fix coding style
> >> use Power ISA 3.1 flag
> >>
> >> include/elf.h | 1 +
> >> 1 file changed, 1 insertion(+)
> >>
> >> diff --git a/include/elf.h b/include/elf.h
> >> index 8fbfe60e09..1858b95acf 100644
> >> --- a/include/elf.h
> >> +++ b/include/elf.h
> >> @@ -554,6 +554,7 @@ typedef struct {
> >> #define PPC_FEATURE2_HTM_NOSC 0x01000000
> >> #define PPC_FEATURE2_ARCH_3_00 0x00800000
> >> #define PPC_FEATURE2_HAS_IEEE128 0x00400000
> >> +#define PPC_FEATURE2_ARCH_3_10 0x00200000
> >>
> >> /* Bits present in AT_HWCAP for Sparc. */
> >
> >
> > Um.. in the corresponding #defines in the kernel 0x00200000 is given
> > to PPC_FEATURE2_DARN, and several more bits are allocated past that
> > point.
>
> Then what do you recommend to use?
This is part of exposed userland ABI, so it needs to be standardized
at least semi-formally. I'm not actually sure who allocates these in
general.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2020-07-13 23:59 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-01 23:43 [PATCH v4 00/11] Add several Power ISA 3.1 32/64-bit vector instructions Lijun Pan
2020-07-01 23:43 ` [PATCH v4 01/11] target/ppc: Introduce Power ISA 3.1 flag Lijun Pan
2020-07-05 9:07 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 02/11] target/ppc: Enable Power ISA 3.1 Lijun Pan
2020-07-05 9:08 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 03/11] target/ppc: add byte-reverse br[dwh] instructions Lijun Pan
2020-07-07 10:30 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 04/11] target/ppc: convert vmuluwm to tcg_gen_gvec_mul Lijun Pan
2020-07-08 12:22 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 05/11] target/ppc: add vmulld instruction Lijun Pan
2020-07-13 5:11 ` David Gibson
2020-07-01 23:43 ` [PATCH v4 06/11] Update PowerPC AT_HWCAP2 definition Lijun Pan
2020-07-13 5:14 ` David Gibson
2020-07-13 19:20 ` Lijun Pan
2020-07-13 23:47 ` David Gibson [this message]
2020-07-14 20:28 ` Lijun Pan
2020-07-01 23:43 ` [PATCH v4 07/11] target/ppc: add vmulld to INDEX_op_mul_vec case Lijun Pan
2020-07-13 19:40 ` Lijun Pan
2020-07-01 23:43 ` [PATCH v4 08/11] target/ppc: add vmulh{su}w instructions Lijun Pan
2020-07-13 19:35 ` Lijun Pan
2020-07-01 23:43 ` [PATCH v4 09/11] fix the prototype of muls64/mulu64 Lijun Pan
2020-07-06 16:14 ` Laurent Vivier
2020-07-05 9:10 ` [PATCH v4 00/11] Add several Power ISA 3.1 32/64-bit vector instructions David Gibson
2020-07-06 7:34 ` Greg Kurz
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