From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Eduardo Habkost <ehabkost@redhat.com>
Cc: Xiaoyao Li <xiaoyao.li@intel.com>, qemu-devel@nongnu.org
Subject: [PATCH 1/2] i386/cpu: Clear FEAT_XSAVE_COMP_{LO, HI} when XSAVE is not available
Date: Thu, 16 Jul 2020 16:20:18 +0800 [thread overview]
Message-ID: <20200716082019.215316-2-xiaoyao.li@intel.com> (raw)
In-Reply-To: <20200716082019.215316-1-xiaoyao.li@intel.com>
Per Intel SDM vol 1, 13.2, if CPUID.1:ECX.XSAVE[bit 26] is 0, the
processor provides no further enumeration through CPUID function 0DH.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1e5123251d74..f5f11603e805 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6261,6 +6261,8 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
uint64_t mask;
if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) {
+ env->features[FEAT_XSAVE_COMP_LO] = 0;
+ env->features[FEAT_XSAVE_COMP_HI] = 0;
return;
}
--
2.18.4
next prev parent reply other threads:[~2020-07-16 8:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-16 8:20 [PATCH 0/2] Two Fixes for xsave compoent features Xiaoyao Li
2020-07-16 8:20 ` Xiaoyao Li [this message]
2020-07-16 15:15 ` [PATCH 1/2] i386/cpu: Clear FEAT_XSAVE_COMP_{LO,HI} when XSAVE is not available Eduardo Habkost
2020-07-16 15:22 ` [PATCH 1/2] i386/cpu: Clear FEAT_XSAVE_COMP_{LO, HI} " Xiaoyao Li
2020-08-18 7:45 ` Paolo Bonzini
2020-07-16 8:20 ` [PATCH 2/2] i386/cpu: Mask off unsupported XSAVE components Xiaoyao Li
2020-07-16 15:14 ` Eduardo Habkost
2020-07-16 15:28 ` Xiaoyao Li
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