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From: Greg Kurz <groug@kaod.org>
To: Markus Armbruster <armbru@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: Re: [PATCH] spapr_pci: Robustify support of PCI bridges
Date: Thu, 16 Jul 2020 16:57:54 +0200	[thread overview]
Message-ID: <20200716165754.50af735a@bahia.lan> (raw)
In-Reply-To: <87r1tblerr.fsf@dusky.pond.sub.org>

On Thu, 16 Jul 2020 16:23:52 +0200
Markus Armbruster <armbru@redhat.com> wrote:

> David Gibson <david@gibson.dropbear.id.au> writes:
> 
> > On Thu, Jul 16, 2020 at 12:32:44PM +0200, Greg Kurz wrote:
> >> On Thu, 16 Jul 2020 14:45:40 +1000
> >> David Gibson <david@gibson.dropbear.id.au> wrote:
> >> 
> >> > On Thu, Jul 09, 2020 at 07:12:47PM +0200, Greg Kurz wrote:
> >> > > Some recent error handling cleanups unveiled issues with our support of
> >> > > PCI bridges:
> >> > > 
> >> > > 1) QEMU aborts when using non-standard PCI bridge types,
> >> > >    unveiled by commit 7ef1553dac "spapr_pci: Drop some dead error handling"
> >> > > 
> >> > > $ qemu-system-ppc64 -M pseries -device pcie-pci-bridge
> >> > > Unexpected error in object_property_find() at qom/object.c:1240:
> >> > > qemu-system-ppc64: -device pcie-pci-bridge: Property '.chassis_nr' not found
> >> > > Aborted (core dumped)
> >> > 
> >> > Oops, I thought we had a check that we actually had a "pci-bridge"
> >> > device before continuing with the hotplug, but I guess not.
> >> 
> >> Ah... are you suggesting we should explicitly check the actual type
> >> of the bridge rather than looking for the "chassis_nr" property ?
> >
> > Uh.. I thought about it, but I don't think it matters much which way
> > we do it.
> 
> Would it make sense to add the "chassis_nr" property to *all* PCI
> bridge devices?
> 

I see that the "PCI Express to PCI/PCI-X Bridge Specification" mentions
a "Chassis Number Register" which looks very similar to the what exists
in standard PCI-to-PCI brdiges. This doesn't seem to be implemented in
our "pcie-pci-bridge" device model though, but of course I have no idea
why :)

Maybe Michael or Marcel (cc'd) can share some thoughts about that ?

> [...]
> 



  reply	other threads:[~2020-07-16 15:07 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-09 17:12 [PATCH] spapr_pci: Robustify support of PCI bridges Greg Kurz
2020-07-16  4:45 ` David Gibson
2020-07-16 10:32   ` Greg Kurz
2020-07-16 13:11     ` David Gibson
2020-07-16 14:23       ` Markus Armbruster
2020-07-16 14:57         ` Greg Kurz [this message]
2020-07-16 23:57           ` David Gibson
2020-07-16 14:01   ` Markus Armbruster
2020-07-16 14:42     ` Greg Kurz
2020-07-16 23:50       ` David Gibson
2020-07-16  6:53 ` Michael S. Tsirkin
2020-07-16 10:34   ` Greg Kurz

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