From: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
To: mpe@ellerman.id.au, paulus@samba.org, david@gibson.dropbear.id.au
Cc: christophe.leroy@c-s.fr, ravi.bangoria@linux.ibm.com,
mikey@neuling.org, kvm@vger.kernel.org, mst@redhat.com,
jniethe5@gmail.com, cohuck@redhat.com, qemu-devel@nongnu.org,
npiggin@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org,
rogealve@br.ibm.com, pedromfc@br.ibm.com, pbonzini@redhat.com
Subject: [PATCH 1/2] ppc: Rename current DAWR macros
Date: Thu, 23 Jul 2020 16:12:19 +0530 [thread overview]
Message-ID: <20200723104220.314671-2-ravi.bangoria@linux.ibm.com> (raw)
In-Reply-To: <20200723104220.314671-1-ravi.bangoria@linux.ibm.com>
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros.
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
---
include/hw/ppc/spapr.h | 2 +-
| 4 ++--
target/ppc/cpu.h | 4 ++--
target/ppc/translate_init.inc.c | 8 ++++----
4 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 3134d339e8..6ba43bc9b8 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -349,7 +349,7 @@ struct SpaprMachineState {
/* Values for 2nd argument to H_SET_MODE */
#define H_SET_MODE_RESOURCE_SET_CIABR 1
-#define H_SET_MODE_RESOURCE_SET_DAWR 2
+#define H_SET_MODE_RESOURCE_SET_DAWR0 2
#define H_SET_MODE_RESOURCE_ADDR_TRANS_MODE 3
#define H_SET_MODE_RESOURCE_LE 4
--git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kvm.h
index 264e266a85..38d61b73f5 100644
--- a/linux-headers/asm-powerpc/kvm.h
+++ b/linux-headers/asm-powerpc/kvm.h
@@ -608,8 +608,8 @@ struct kvm_ppc_cpu_char {
#define KVM_REG_PPC_BESCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xa7)
#define KVM_REG_PPC_TAR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xa8)
#define KVM_REG_PPC_DPDES (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xa9)
-#define KVM_REG_PPC_DAWR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xaa)
-#define KVM_REG_PPC_DAWRX (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xab)
+#define KVM_REG_PPC_DAWR0 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xaa)
+#define KVM_REG_PPC_DAWRX0 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xab)
#define KVM_REG_PPC_CIABR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xac)
#define KVM_REG_PPC_IC (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xad)
#define KVM_REG_PPC_VTB (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xae)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index e7d382ac10..0f641becf7 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1464,10 +1464,10 @@ typedef PowerPCCPU ArchCPU;
#define SPR_MPC_BAR (0x09F)
#define SPR_PSPB (0x09F)
#define SPR_DPDES (0x0B0)
-#define SPR_DAWR (0x0B4)
+#define SPR_DAWR0 (0x0B4)
#define SPR_RPR (0x0BA)
#define SPR_CIABR (0x0BB)
-#define SPR_DAWRX (0x0BC)
+#define SPR_DAWRX0 (0x0BC)
#define SPR_HFSCR (0x0BE)
#define SPR_VRSAVE (0x100)
#define SPR_USPRG0 (0x100)
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index 7e66822b5d..143adf27c0 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -7667,16 +7667,16 @@ static void gen_spr_book3s_dbg(CPUPPCState *env)
static void gen_spr_book3s_207_dbg(CPUPPCState *env)
{
- spr_register_kvm_hv(env, SPR_DAWR, "DAWR",
+ spr_register_kvm_hv(env, SPR_DAWR0, "DAWR0",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
- KVM_REG_PPC_DAWR, 0x00000000);
- spr_register_kvm_hv(env, SPR_DAWRX, "DAWRX",
+ KVM_REG_PPC_DAWR0, 0x00000000);
+ spr_register_kvm_hv(env, SPR_DAWRX0, "DAWRX0",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
- KVM_REG_PPC_DAWRX, 0x00000000);
+ KVM_REG_PPC_DAWRX0, 0x00000000);
spr_register_kvm_hv(env, SPR_CIABR, "CIABR",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, SPR_NOACCESS,
--
2.17.1
next prev parent reply other threads:[~2020-07-23 14:14 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-23 10:42 [PATCH 0/2] ppc: Enable 2nd DAWR support on p10 Ravi Bangoria
2020-07-23 10:42 ` Ravi Bangoria [this message]
2020-07-23 10:55 ` [PATCH 1/2] ppc: Rename current DAWR macros Cornelia Huck
2020-07-23 10:42 ` [PATCH 2/2] ppc: Enable 2nd DAWR support on p10 Ravi Bangoria
2020-07-23 10:58 ` Cornelia Huck
2020-07-24 4:56 ` David Gibson
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