From: Anthony PERARD <anthony.perard@citrix.com>
To: Michael Tokarev <mjt@tls.msk.ru>
Cc: Igor Mammedov <imammedo@redhat.com>,
qemu-devel@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [PATCH] acpi: Fix access to PM1 control and status registers
Date: Thu, 23 Jul 2020 14:14:50 +0100 [thread overview]
Message-ID: <20200723131450.GB2866@perard.uk.xensource.com> (raw)
In-Reply-To: <3eb33054-e9b0-58f2-8d50-9cc26314dcfb@msgid.tls.msk.ru>
On Thu, Jul 23, 2020 at 03:54:18PM +0300, Michael Tokarev wrote:
> 01.07.2020 15:48, Anthony PERARD wrote:
>
> > I actually tried, but when reading `addr` or `addr+1` I had the same
> > value. So I guess `addr` wasn't taken into account.
>
> AFAICS, these registers aren't actually supposed to be accessed like this
> as addr+1. ACPI and ISA spec states multiple times that `addr' should be
> accessible as 8/16/32 bits, but it does not mention `addr+1' or `addr+2'.
I guess that's why there's never been a "fix" for this before. Thanks
for the explanation.
> So far all now-rejected accesses we've seen (not that many but still) goes
> to `addr', not to any other variation of it.
>
> /mjt
--
Anthony PERARD
prev parent reply other threads:[~2020-07-23 13:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-01 11:05 [PATCH] acpi: Fix access to PM1 control and status registers Anthony PERARD
2020-07-01 12:01 ` Michael S. Tsirkin
2020-07-01 12:48 ` Anthony PERARD
2020-07-02 11:12 ` Michael S. Tsirkin
2020-07-10 9:42 ` Anthony PERARD
2020-07-23 12:44 ` Michael S. Tsirkin
2020-07-23 13:08 ` Anthony PERARD
2020-07-16 9:05 ` Cédric Le Goater
2020-07-23 12:46 ` Michael S. Tsirkin
2020-07-23 12:54 ` Michael Tokarev
2020-07-23 13:14 ` Anthony PERARD [this message]
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