From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 5/7] hw/arm/boot: Fix PAUTH for EL3 direct kernel boot
Date: Mon, 27 Jul 2020 16:19:18 +0100 [thread overview]
Message-ID: <20200727151920.19150-6-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200727151920.19150-1-peter.maydell@linaro.org>
From: Richard Henderson <richard.henderson@linaro.org>
When booting an EL3 cpu with -kernel, we set up EL3 and then
drop down to EL2. We need to enable access to v8.3-PAuth
keys and instructions at EL3 before doing so.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200724163853.504655-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/boot.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index fef4072db16..c44fd3382dd 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -736,6 +736,9 @@ static void do_cpu_reset(void *opaque)
} else {
env->pstate = PSTATE_MODE_EL1h;
}
+ if (cpu_isar_feature(aa64_pauth, cpu)) {
+ env->cp15.scr_el3 |= SCR_API | SCR_APK;
+ }
/* AArch64 kernels never boot in secure mode */
assert(!info->secure_boot);
/* This hook is only supported for AArch32 currently:
--
2.20.1
next prev parent reply other threads:[~2020-07-27 15:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-27 15:19 [PULL 0/7] target-arm queue Peter Maydell
2020-07-27 15:19 ` [PULL 1/7] ACPI: Assert that we don't run out of the preallocated memory Peter Maydell
2020-07-27 15:19 ` [PULL 2/7] hw/misc/aspeed_sdmc: Fix incorrect memory size Peter Maydell
2020-07-27 15:19 ` [PULL 3/7] target/arm: Always pass cacheattr in S1_ptw_translate Peter Maydell
2020-07-27 15:19 ` [PULL 4/7] docs/system/arm/virt: Document 'mte' machine option Peter Maydell
2020-07-27 15:19 ` Peter Maydell [this message]
2020-07-27 15:19 ` [PULL 6/7] hw/arm/boot: Fix MTE for EL3 direct kernel boot Peter Maydell
2020-07-27 15:19 ` [PULL 7/7] target/arm: Improve IMPDEF algorithm for IRG Peter Maydell
2020-07-28 18:43 ` [PULL 0/7] target-arm queue Peter Maydell
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