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* [PATCH] target/arm: Rename function disas_ldst_pac to disas_ld_pac
@ 2020-08-04  0:27 Peter Collingbourne
  2020-08-04  9:34 ` Peter Maydell
  0 siblings, 1 reply; 2+ messages in thread
From: Peter Collingbourne @ 2020-08-04  0:27 UTC (permalink / raw)
  To: Richard Henderson, qemu-devel, qemu-arm; +Cc: Peter Collingbourne

The name disas_ldst_pac is misleading as it implies the existence
of authenticating store instructions, so rename it to avoid that
implication.

Signed-off-by: Peter Collingbourne <pcc@google.com>
---
 target/arm/translate-a64.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 8c0764957c..749de2e509 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -3408,8 +3408,8 @@ static void disas_ldst_atomic(DisasContext *s, uint32_t insn,
  * W: pre-indexing flag
  * S: sign for imm9.
  */
-static void disas_ldst_pac(DisasContext *s, uint32_t insn,
-                           int size, int rt, bool is_vector)
+static void disas_ld_pac(DisasContext *s, uint32_t insn,
+                         int size, int rt, bool is_vector)
 {
     int rn = extract32(insn, 5, 5);
     bool is_wback = extract32(insn, 11, 1);
@@ -3562,7 +3562,7 @@ static void disas_ldst_reg(DisasContext *s, uint32_t insn)
             disas_ldst_reg_roffset(s, insn, opc, size, rt, is_vector);
             return;
         default:
-            disas_ldst_pac(s, insn, size, rt, is_vector);
+            disas_ld_pac(s, insn, size, rt, is_vector);
             return;
         }
         break;
-- 
2.28.0.163.g6104cc2f0b6-goog



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2020-08-04  0:27 [PATCH] target/arm: Rename function disas_ldst_pac to disas_ld_pac Peter Collingbourne
2020-08-04  9:34 ` Peter Maydell

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