From: Robert Foley <robert.foley@linaro.org>
To: qemu-devel@nongnu.org
Cc: Thomas Huth <thuth@redhat.com>,
robert.foley@linaro.org, David Hildenbrand <david@redhat.com>,
Cornelia Huck <cohuck@redhat.com>,
"open list:S390 TCG CPUs" <qemu-s390x@nongnu.org>,
cota@braap.org, peter.puhov@linaro.org, pbonzini@redhat.com,
alex.bennee@linaro.org, Richard Henderson <rth@twiddle.net>
Subject: [PATCH v1 17/21] target/s390x: add BQL to do_interrupt and cpu_exec_interrupt
Date: Wed, 5 Aug 2020 14:12:59 -0400 [thread overview]
Message-ID: <20200805181303.7822-18-robert.foley@linaro.org> (raw)
In-Reply-To: <20200805181303.7822-1-robert.foley@linaro.org>
This is part of a series of changes to remove the implied BQL
from the common code of cpu_handle_interrupt and
cpu_handle_exception. As part of removing the implied BQL
from the common code, we are pushing the BQL holding
down into the per-arch implementation functions of
do_interrupt and cpu_exec_interrupt.
The purpose of this set of changes is to set the groundwork
so that an arch could move towards removing
the BQL from the cpu_handle_interrupt/exception paths.
This approach was suggested by Paolo Bonzini.
For reference, here are two key posts in the discussion, explaining
the reasoning/benefits of this approach.
https://lists.gnu.org/archive/html/qemu-devel/2020-07/msg08731.html
https://lists.gnu.org/archive/html/qemu-devel/2020-08/msg00044.html
Signed-off-by: Robert Foley <robert.foley@linaro.org>
---
target/s390x/excp_helper.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
index dde7afc2f0..b215b4a4a7 100644
--- a/target/s390x/excp_helper.c
+++ b/target/s390x/excp_helper.c
@@ -470,7 +470,10 @@ void s390_cpu_do_interrupt(CPUState *cs)
S390CPU *cpu = S390_CPU(cs);
CPUS390XState *env = &cpu->env;
bool stopped = false;
-
+ bool bql = !qemu_mutex_iothread_locked();
+ if (bql) {
+ qemu_mutex_lock_iothread();
+ }
qemu_log_mask(CPU_LOG_INT, "%s: %d at psw=%" PRIx64 ":%" PRIx64 "\n",
__func__, cs->exception_index, env->psw.mask, env->psw.addr);
@@ -541,10 +544,14 @@ try_deliver:
/* unhalt if we had a WAIT PSW somehwere in our injection chain */
s390_cpu_unhalt(cpu);
}
+ if (bql) {
+ qemu_mutex_unlock_iothread();
+ }
}
bool s390_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
+ qemu_mutex_lock_iothread();
if (interrupt_request & CPU_INTERRUPT_HARD) {
S390CPU *cpu = S390_CPU(cs);
CPUS390XState *env = &cpu->env;
@@ -552,10 +559,12 @@ bool s390_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
if (env->ex_value) {
/* Execution of the target insn is indivisible from
the parent EXECUTE insn. */
+ qemu_mutex_unlock_iothread();
return false;
}
if (s390_cpu_has_int(cpu)) {
s390_cpu_do_interrupt(cs);
+ qemu_mutex_unlock_iothread();
return true;
}
if (env->psw.mask & PSW_MASK_WAIT) {
@@ -564,6 +573,7 @@ bool s390_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HALT);
}
}
+ qemu_mutex_unlock_iothread();
return false;
}
--
2.17.1
next prev parent reply other threads:[~2020-08-05 18:28 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-05 18:12 [PATCH v1 00/21] accel/tcg: remove implied BQL from cpu_handle_interrupt/exception path Robert Foley
2020-08-05 18:12 ` [PATCH v1 01/21] accel/tcg: Change interrupt/exception handling to remove implied BQL Robert Foley
2020-08-05 19:18 ` Richard Henderson
2020-08-06 9:22 ` Paolo Bonzini
2020-08-06 16:11 ` Robert Foley
2020-08-06 18:45 ` Paolo Bonzini
2020-08-06 20:04 ` Robert Foley
2020-08-07 22:18 ` Robert Foley
2020-08-08 12:00 ` Paolo Bonzini
2020-08-10 12:54 ` Robert Foley
2020-08-05 18:12 ` [PATCH v1 02/21] target/alpha: add BQL to do_interrupt and cpu_exec_interrupt Robert Foley
2020-08-05 19:18 ` Richard Henderson
2020-08-05 19:57 ` Robert Foley
2020-08-05 18:12 ` [PATCH v1 03/21] target/arm: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 04/21] target/avr: " Robert Foley
2020-08-06 18:36 ` Michael Rolnik
2020-08-06 19:36 ` Robert Foley
2020-08-05 18:12 ` [PATCH v1 05/21] target/cris: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 06/21] target/hppa: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 07/21] target/i386: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 08/21] target/lm32: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 09/21] target/m68k: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 10/21] target/microblaze: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 11/21] target/mips: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 12/21] target/nios2: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 13/21] target/openrisc: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 14/21] target/ppc: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 15/21] target/riscv: " Robert Foley
2020-08-05 18:12 ` [PATCH v1 16/21] target/rx: " Robert Foley
2020-08-05 18:12 ` Robert Foley [this message]
2020-08-06 8:59 ` [PATCH v1 17/21] target/s390x: " Cornelia Huck
2020-08-06 9:12 ` Paolo Bonzini
2020-08-06 10:03 ` Alex Bennée
2020-08-05 18:13 ` [PATCH v1 18/21] target/sh4: " Robert Foley
2020-08-05 18:13 ` [PATCH v1 19/21] target/sparc: " Robert Foley
2020-08-05 18:13 ` [PATCH v1 20/21] target/unicore32: " Robert Foley
2020-08-05 18:13 ` [PATCH v1 21/21] target/xtensa: " Robert Foley
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