From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.rutland@arm.com, peter.maydell@linaro.org, alex.bennee@linaro.org
Subject: [PATCH 1/2] target/arm: Add cpu property to control pauth
Date: Tue, 11 Aug 2020 23:53:38 -0700 [thread overview]
Message-ID: <20200812065339.2030527-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200812065339.2030527-1-richard.henderson@linaro.org>
The crypto overhead of emulating pauth can be significant for
some workloads. Add an enumeration property that allows the
feature to be turned off, on with the architected algorithm,
or on with an implementation defined algorithm.
The architected algorithm is quite expensive to emulate;
using another algorithm may allow hardware acceleration.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu64.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index dd696183df..3181d0e2f8 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -572,6 +572,69 @@ void aarch64_add_sve_properties(Object *obj)
}
}
+static const char * const pauth_names[] = {
+ "off", "impdef", "arch"
+};
+
+static const QEnumLookup pauth_lookup = {
+ .array = pauth_names,
+ .size = ARRAY_SIZE(pauth_names)
+};
+
+static int cpu_arm_get_pauth(Object *obj, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ int value;
+
+ /* We will always set GPA+APA and GPI+API to the same value. */
+ if (FIELD_EX64(cpu->isar.id_aa64isar1, ID_AA64ISAR1, APA)) {
+ value = 2;
+ } else if (FIELD_EX64(cpu->isar.id_aa64isar1, ID_AA64ISAR1, API)) {
+ value = 1;
+ } else {
+ value = 0;
+ }
+ return value;
+}
+
+static void cpu_arm_set_pauth(Object *obj, int value, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ uint64_t t;
+
+ /* TODO: Handle HaveEnhancedPAC, HaveEnhancedPAC2, HaveFPAC. */
+ t = cpu->isar.id_aa64isar1;
+ switch (value) {
+ case 0:
+ t = FIELD_DP64(t, ID_AA64ISAR1, APA, 0);
+ t = FIELD_DP64(t, ID_AA64ISAR1, API, 0);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPA, 0);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPI, 0);
+ break;
+ case 1:
+ t = FIELD_DP64(t, ID_AA64ISAR1, APA, 0);
+ t = FIELD_DP64(t, ID_AA64ISAR1, API, 1);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPA, 0);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPI, 1);
+ break;
+ case 2:
+ t = FIELD_DP64(t, ID_AA64ISAR1, APA, 1);
+ t = FIELD_DP64(t, ID_AA64ISAR1, API, 0);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPA, 1);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPI, 0);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ cpu->isar.id_aa64isar1 = t;
+}
+
+static void aarch64_add_pauth_properties(Object *obj)
+{
+ object_property_add_enum(obj, "pauth", "ARMPauthKind", &pauth_lookup,
+ cpu_arm_get_pauth, cpu_arm_set_pauth);
+}
+
/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
* otherwise, a CPU with as many features enabled as our emulation supports.
* The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
@@ -720,6 +783,7 @@ static void aarch64_max_initfn(Object *obj)
#endif
}
+ aarch64_add_pauth_properties(obj);
aarch64_add_sve_properties(obj);
object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq,
cpu_max_set_sve_max_vq, NULL, NULL);
--
2.25.1
next prev parent reply other threads:[~2020-08-12 6:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-12 6:53 [PATCH 0/2] target/arm: Implement an IMPDEF pauth algorithm Richard Henderson
2020-08-12 6:53 ` Richard Henderson [this message]
2020-08-12 11:00 ` [PATCH 1/2] target/arm: Add cpu property to control pauth Andrew Jones
2020-08-12 15:10 ` Richard Henderson
2020-08-12 16:31 ` Andrew Jones
2020-08-13 6:03 ` Andrew Jones
2020-08-13 9:05 ` Mark Rutland
2020-08-13 9:49 ` Andrew Jones
2020-08-13 11:10 ` Mark Rutland
2020-08-12 6:53 ` [PATCH 2/2] target/arm: Implement an IMPDEF pauth algorithm Richard Henderson
2020-08-12 9:49 ` Alex Bennée
2020-08-12 15:13 ` Richard Henderson
2020-08-12 17:13 ` Alex Bennée
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