From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@gmail.com
Subject: [PATCH 07/77] target/microblaze: Split out EAR from env->sregs
Date: Tue, 25 Aug 2020 13:58:40 -0700 [thread overview]
Message-ID: <20200825205950.730499-8-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200825205950.730499-1-richard.henderson@linaro.org>
Continue eliminating the sregs array in favor of individual members.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/cpu.h | 1 +
target/microblaze/gdbstub.c | 4 ++--
target/microblaze/helper.c | 6 +++---
target/microblaze/op_helper.c | 8 ++++----
target/microblaze/translate.c | 6 ++++--
5 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 36de61d9f9..c9035b410e 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -238,6 +238,7 @@ struct CPUMBState {
uint32_t regs[32];
uint64_t pc;
uint64_t msr;
+ uint64_t ear;
uint64_t sregs[14];
float_status fp_status;
/* Stack protectors. Yes, it's a hw feature. */
diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c
index e4c4936a7a..e33a613efe 100644
--- a/target/microblaze/gdbstub.c
+++ b/target/microblaze/gdbstub.c
@@ -65,7 +65,7 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
val = env->msr;
break;
case GDB_EAR:
- val = env->sregs[SR_EAR];
+ val = env->ear;
break;
case GDB_ESR:
val = env->sregs[SR_ESR];
@@ -121,7 +121,7 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
env->msr = tmp;
break;
case GDB_EAR:
- env->sregs[SR_EAR] = tmp;
+ env->ear = tmp;
break;
case GDB_ESR:
env->sregs[SR_ESR] = tmp;
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index a18314540f..afe9634781 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -85,7 +85,7 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
qemu_log_mask(CPU_LOG_MMU, "mmu=%d miss v=%" VADDR_PRIx "\n",
mmu_idx, address);
- env->sregs[SR_EAR] = address;
+ env->ear = address;
switch (lu.err) {
case ERR_PROT:
env->sregs[SR_ESR] = access_type == MMU_INST_FETCH ? 17 : 16;
@@ -145,7 +145,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"hw exception at pc=%" PRIx64 " ear=%" PRIx64 " "
"esr=%" PRIx64 " iflags=%x\n",
- env->pc, env->sregs[SR_EAR],
+ env->pc, env->ear,
env->sregs[SR_ESR], env->iflags);
log_cpu_state_mask(CPU_LOG_INT, cs, 0);
env->iflags &= ~(IMM_FLAG | D_FLAG);
@@ -188,7 +188,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"exception at pc=%" PRIx64 " ear=%" PRIx64 " "
"iflags=%x\n",
- env->pc, env->sregs[SR_EAR], env->iflags);
+ env->pc, env->ear, env->iflags);
log_cpu_state_mask(CPU_LOG_INT, cs, 0);
env->iflags &= ~(IMM_FLAG | D_FLAG);
env->pc = cpu->cfg.base_vectors + 0x20;
diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
index 3668382d36..5bacd29663 100644
--- a/target/microblaze/op_helper.c
+++ b/target/microblaze/op_helper.c
@@ -78,7 +78,7 @@ void helper_debug(CPUMBState *env)
qemu_log("PC=%" PRIx64 "\n", env->pc);
qemu_log("rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " "
"debug[%x] imm=%x iflags=%x\n",
- env->msr, env->sregs[SR_ESR], env->sregs[SR_EAR],
+ env->msr, env->sregs[SR_ESR], env->ear,
env->debug, env->imm, env->iflags);
qemu_log("btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) eip=%d ie=%d\n",
env->btaken, env->btarget,
@@ -431,7 +431,7 @@ void helper_memalign(CPUMBState *env, target_ulong addr,
"unaligned access addr=" TARGET_FMT_lx
" mask=%x, wr=%d dr=r%d\n",
addr, mask, wr, dr);
- env->sregs[SR_EAR] = addr;
+ env->ear = addr;
env->sregs[SR_ESR] = ESR_EC_UNALIGNED_DATA | (wr << 10) \
| (dr & 31) << 5;
if (mask == 3) {
@@ -450,7 +450,7 @@ void helper_stackprot(CPUMBState *env, target_ulong addr)
qemu_log_mask(CPU_LOG_INT, "Stack protector violation at "
TARGET_FMT_lx " %x %x\n",
addr, env->slr, env->shr);
- env->sregs[SR_EAR] = addr;
+ env->ear = addr;
env->sregs[SR_ESR] = ESR_EC_STACKPROT;
helper_raise_exception(env, EXCP_HW_EXCP);
}
@@ -488,7 +488,7 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
return;
}
- env->sregs[SR_EAR] = addr;
+ env->ear = addr;
if (access_type == MMU_INST_FETCH) {
if ((env->pvr.regs[2] & PVR2_IOPB_BUS_EXC_MASK)) {
env->sregs[SR_ESR] = ESR_EC_INSN_BUS;
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 9f2dcd82cd..62747b02f3 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -1809,7 +1809,7 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)
qemu_fprintf(f, "rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " "
"debug=%x imm=%x iflags=%x fsr=%" PRIx64 " "
"rbtr=%" PRIx64 "\n",
- env->msr, env->sregs[SR_ESR], env->sregs[SR_EAR],
+ env->msr, env->sregs[SR_ESR], env->ear,
env->debug, env->imm, env->iflags, env->sregs[SR_FSR],
env->sregs[SR_BTR]);
qemu_fprintf(f, "btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) "
@@ -1873,8 +1873,10 @@ void mb_tcg_init(void)
tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, pc), "rpc");
cpu_SR[SR_MSR] =
tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, msr), "rmsr");
+ cpu_SR[SR_EAR] =
+ tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, ear), "rear");
- for (i = SR_MSR + 1; i < ARRAY_SIZE(cpu_SR); i++) {
+ for (i = SR_EAR + 1; i < ARRAY_SIZE(cpu_SR); i++) {
cpu_SR[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUMBState, sregs[i]),
special_regnames[i]);
--
2.25.1
next prev parent reply other threads:[~2020-08-25 21:06 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-25 20:58 [PATCH 00/77] target/microblaze improvements Richard Henderson
2020-08-25 20:58 ` [PATCH 01/77] tests/tcg: Add microblaze to arches filter Richard Henderson
2020-08-26 16:20 ` Edgar E. Iglesias
2020-08-25 20:58 ` [PATCH 02/77] tests/tcg: Do not require FE_TOWARDZERO Richard Henderson
2020-08-26 16:20 ` Edgar E. Iglesias
2020-08-25 20:58 ` [PATCH 03/77] tests/tcg: Do not require FE_* exception bits Richard Henderson
2020-08-26 16:21 ` Edgar E. Iglesias
2020-08-25 20:58 ` [PATCH 04/77] target/microblaze: Tidy gdbstub Richard Henderson
2020-08-25 20:58 ` [PATCH 05/77] target/microblaze: Split out PC from env->sregs Richard Henderson
2020-08-25 20:58 ` [PATCH 06/77] target/microblaze: Split out MSR " Richard Henderson
2020-08-25 20:58 ` Richard Henderson [this message]
2020-08-25 20:58 ` [PATCH 08/77] target/microblaze: Split out ESR " Richard Henderson
2020-08-25 20:58 ` [PATCH 09/77] target/microblaze: Split out FSR " Richard Henderson
2020-08-25 20:58 ` [PATCH 10/77] target/microblaze: Split out BTR " Richard Henderson
2020-08-25 20:58 ` [PATCH 11/77] target/microblaze: Split out EDR " Richard Henderson
2020-08-25 20:58 ` [PATCH 12/77] target/microblaze: Split the cpu_SR array Richard Henderson
2020-08-25 20:58 ` [PATCH 13/77] target/microblaze: Fix width of PC and BTARGET Richard Henderson
2020-08-25 20:58 ` [PATCH 14/77] target/microblaze: Fix width of MSR Richard Henderson
2020-08-25 20:58 ` [PATCH 15/77] target/microblaze: Fix width of ESR Richard Henderson
2020-08-25 20:58 ` [PATCH 16/77] target/microblaze: Fix width of FSR Richard Henderson
2020-08-25 20:58 ` [PATCH 17/77] target/microblaze: Fix width of BTR Richard Henderson
2020-08-25 20:58 ` [PATCH 18/77] target/microblaze: Fix width of EDR Richard Henderson
2020-08-25 20:58 ` [PATCH 19/77] target/microblaze: Remove cpu_ear Richard Henderson
2020-08-25 20:58 ` [PATCH 20/77] target/microblaze: Tidy raising of exceptions Richard Henderson
2020-08-25 20:58 ` [PATCH 21/77] target/microblaze: Mark raise_exception as noreturn Richard Henderson
2020-08-25 20:58 ` [PATCH 22/77] target/microblaze: Remove helper_debug and env->debug Richard Henderson
2020-08-25 20:58 ` [PATCH 23/77] target/microblaze: Rename env_* tcg variables to cpu_* Richard Henderson
2020-08-25 20:58 ` [PATCH 24/77] target/microblaze: Tidy mb_tcg_init Richard Henderson
2020-08-25 20:58 ` [PATCH 25/77] target/microblaze: Split out MSR[C] to its own variable Richard Henderson
2020-08-25 20:58 ` [PATCH 26/77] target/microblaze: Use DISAS_NORETURN Richard Henderson
2020-08-25 20:59 ` [PATCH 27/77] target/microblaze: Check singlestep_enabled in gen_goto_tb Richard Henderson
2020-08-25 20:59 ` [PATCH 28/77] target/microblaze: Convert to DisasContextBase Richard Henderson
2020-08-25 20:59 ` [PATCH 29/77] target/microblaze: Convert to translator_loop Richard Henderson
2020-08-25 20:59 ` [PATCH 30/77] target/microblaze: Remove SIM_COMPAT Richard Henderson
2020-08-25 20:59 ` [PATCH 31/77] target/microblaze: Remove DISAS_GNU Richard Henderson
2020-08-25 20:59 ` [PATCH 32/77] target/microblaze: Remove empty D macros Richard Henderson
2020-08-25 20:59 ` [PATCH 33/77] target/microblaze: Remove LOG_DIS Richard Henderson
2020-08-25 20:59 ` [PATCH 34/77] target/microblaze: Ensure imm constant is always available Richard Henderson
2020-08-25 20:59 ` [PATCH 35/77] target/microblaze: Add decodetree infrastructure Richard Henderson
2020-08-25 20:59 ` [PATCH 36/77] target/microblaze: Convert dec_add to decodetree Richard Henderson
2020-08-25 20:59 ` [PATCH 37/77] target/microblaze: Convert dec_sub " Richard Henderson
2020-08-25 20:59 ` [PATCH 38/77] target/microblaze: Implement cmp and cmpu inline Richard Henderson
2020-08-25 20:59 ` [PATCH 39/77] target/microblaze: Convert dec_pattern to decodetree Richard Henderson
2020-08-25 20:59 ` [PATCH 40/77] target/microblaze: Convert dec_and, dec_or, dec_xor " Richard Henderson
2020-08-25 20:59 ` [PATCH 41/77] target/microblaze: Convert dec_mul " Richard Henderson
2020-08-25 20:59 ` [PATCH 42/77] target/microblaze: Convert dec_div " Richard Henderson
2020-08-25 20:59 ` [PATCH 43/77] target/microblaze: Unwind properly when raising divide-by-zero Richard Henderson
2020-08-25 20:59 ` [PATCH 44/77] target/microblaze: Convert dec_bit to decodetree Richard Henderson
2020-08-25 20:59 ` [PATCH 45/77] target/microblaze: Convert dec_barrel " Richard Henderson
2020-08-25 20:59 ` [PATCH 46/77] target/microblaze: Convert dec_imm " Richard Henderson
2020-08-25 20:59 ` [PATCH 47/77] target/microblaze: Convert dec_fpu " Richard Henderson
2020-08-25 20:59 ` [PATCH 48/77] target/microblaze: Fix cpu unwind for fpu exceptions Richard Henderson
2020-08-25 20:59 ` [PATCH 49/77] target/microblaze: Mark fpu helpers TCG_CALL_NO_WG Richard Henderson
2020-08-25 20:59 ` [PATCH 50/77] target/microblaze: Replace MSR_EE_FLAG with MSR_EE Richard Henderson
2020-08-25 20:59 ` [PATCH 51/77] target/microblaze: Cache mem_index in DisasContext Richard Henderson
2020-08-25 20:59 ` [PATCH 52/77] target/microblaze: Fix cpu unwind for stackprot Richard Henderson
2020-08-25 20:59 ` [PATCH 53/77] target/microblaze: Convert dec_load and dec_store to decodetree Richard Henderson
2020-08-25 20:59 ` [PATCH 54/77] target/microblaze: Assert no overlap in flags making up tb_flags Richard Henderson
2020-08-25 20:59 ` [PATCH 55/77] target/microblaze: Move bimm to BIMM_FLAG Richard Henderson
2020-08-25 20:59 ` [PATCH 56/77] target/microblaze: Store "current" iflags in insn_start Richard Henderson
2020-08-25 20:59 ` [PATCH 57/77] tcg: Add tcg_get_insn_start_param Richard Henderson
2020-08-25 20:59 ` [PATCH 58/77] target/microblaze: Use cc->do_unaligned_access Richard Henderson
2020-08-25 20:59 ` [PATCH 59/77] target/microblaze: Replace clear_imm with tb_flags_to_set Richard Henderson
2020-08-25 20:59 ` [PATCH 60/77] target/microblaze: Replace delayed_branch " Richard Henderson
2020-08-25 20:59 ` [PATCH 61/77] target/microblaze: Tidy mb_cpu_dump_state Richard Henderson
2020-08-25 20:59 ` [PATCH 62/77] target/microblaze: Try to keep imm and delay slot together Richard Henderson
2020-08-27 19:17 ` Edgar E. Iglesias
2020-08-27 21:33 ` Richard Henderson
2020-08-29 15:27 ` Richard Henderson
2020-08-25 20:59 ` [PATCH 63/77] target/microblaze: Convert brk and brki to decodetree Richard Henderson
2020-08-25 20:59 ` [PATCH 64/77] target/microblaze: Convert mbar " Richard Henderson
2020-08-27 9:24 ` Edgar E. Iglesias
2020-08-27 9:58 ` Richard Henderson
2020-08-27 10:08 ` Edgar E. Iglesias
2020-08-27 11:11 ` Richard Henderson
2020-08-25 20:59 ` [PATCH 65/77] target/microblaze: Reorganize branching Richard Henderson
2020-08-25 20:59 ` [PATCH 66/77] target/microblaze: Use tcg_gen_lookup_and_goto_ptr Richard Henderson
2020-08-28 6:33 ` Edgar E. Iglesias
2020-08-28 13:32 ` Richard Henderson
2020-08-25 20:59 ` [PATCH 67/77] target/microblaze: Convert dec_br to decodetree Richard Henderson
2020-08-25 20:59 ` [PATCH 68/77] target/microblaze: Convert dec_bcc " Richard Henderson
2020-08-25 20:59 ` [PATCH 69/77] target/microblaze: Convert dec_rts " Richard Henderson
2020-08-25 20:59 ` [PATCH 70/77] target/microblaze: Tidy do_rti, do_rtb, do_rte Richard Henderson
2020-08-25 20:59 ` [PATCH 71/77] target/microblaze: Convert msrclr, msrset to decodetree Richard Henderson
2020-08-25 20:59 ` [PATCH 72/77] target/microblaze: Convert dec_msr " Richard Henderson
2020-08-25 20:59 ` [PATCH 73/77] target/microblaze: Convert dec_stream " Richard Henderson
2020-08-27 21:10 ` Edgar E. Iglesias
2020-08-27 21:12 ` Richard Henderson
2020-08-25 20:59 ` [PATCH 74/77] target/microblaze: Remove last of old decoder Richard Henderson
2020-08-25 20:59 ` [PATCH 75/77] target/microblaze: Remove cpu_R[0] Richard Henderson
2020-08-25 20:59 ` [PATCH 76/77] target/microblaze: Add flags markup to some helpers Richard Henderson
2020-08-25 20:59 ` [PATCH 77/77] target/microblaze: Reduce linux-user address space to 32-bit Richard Henderson
2020-08-26 15:27 ` [PATCH 00/77] target/microblaze improvements Edgar E. Iglesias
2020-08-26 18:07 ` Edgar E. Iglesias
2020-08-27 9:11 ` Edgar E. Iglesias
2020-08-27 10:01 ` Richard Henderson
2020-08-27 10:22 ` Edgar E. Iglesias
2020-08-27 11:19 ` Richard Henderson
2020-08-27 17:09 ` Edgar E. Iglesias
2020-08-28 13:36 ` Richard Henderson
2020-08-28 14:04 ` Edgar E. Iglesias
2020-08-28 13:19 ` Edgar E. Iglesias
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