From: Janosch Frank <frankja@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: borntraeger@de.ibm.com, thuth@redhat.com, cohuck@redhat.com,
david@redhat.com
Subject: [PATCH RFC v2 3/4] pc-bios: s390x: Save io and external new PSWs before overwriting them
Date: Thu, 27 Aug 2020 05:31:51 -0400 [thread overview]
Message-ID: <20200827093152.3026-4-frankja@linux.ibm.com> (raw)
In-Reply-To: <20200827093152.3026-1-frankja@linux.ibm.com>
Currently we always overwrite the mentioned exception new PSWs before
loading the enabled wait PSW. Let's save the PSW before overwriting
and restore it right before starting the loaded kernel.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
---
Maybe we should rather statically allocate a lowcore so we don't dirty
0x0 at all.
---
pc-bios/s390-ccw/jump2ipl.c | 3 ++
pc-bios/s390-ccw/start.S | 62 +++++++++++++++++++++++++++----------
2 files changed, 48 insertions(+), 17 deletions(-)
diff --git a/pc-bios/s390-ccw/jump2ipl.c b/pc-bios/s390-ccw/jump2ipl.c
index 143d027bf7..a44f3ab5b3 100644
--- a/pc-bios/s390-ccw/jump2ipl.c
+++ b/pc-bios/s390-ccw/jump2ipl.c
@@ -13,12 +13,15 @@
#define KERN_IMAGE_START 0x010000UL
#define RESET_PSW_MASK (PSW_MASK_SHORTPSW | PSW_MASK_64)
+extern uint64_t *psw_save_io, *psw_save_ext;
uint64_t *reset_psw = 0, save_psw, ipl_continue;
static void jump_to_IPL_2(void)
{
/* Restore reset PSW and io and external new PSWs */
*reset_psw = save_psw;
+ memcpy((void *)0x1f0, psw_save_io, 16);
+ memcpy((void *)0x1b0, psw_save_ext, 16);
/* No reset PSW, let's jump instead. */
if (ipl_continue) {
diff --git a/pc-bios/s390-ccw/start.S b/pc-bios/s390-ccw/start.S
index ce519300a1..939aac3a7c 100644
--- a/pc-bios/s390-ccw/start.S
+++ b/pc-bios/s390-ccw/start.S
@@ -34,7 +34,17 @@ remainder:
larl %r2,memsetxc
ex %r3,0(%r2)
done:
- j main /* And call C */
+ /* prepare i/o call handler */
+ larl %r1, io_new_code
+ larl %r2, io_new_psw
+ stg %r1, 8(%r2)
+ mvc 0x1f0(16),0(%r2)
+ /* prepare external call handler */
+ larl %r1, external_new_code
+ larl %r2, external_new_psw
+ stg %r1, 8(%r2)
+ mvc 0x1b0(16),0(%r2)
+ j main /* And call C */
memsetxc:
xc 0(1,%r1),0(%r1)
@@ -64,13 +74,16 @@ consume_sclp_int:
oi 6(%r15),0x2
lctlg %c0,%c0,0(%r15)
/* prepare external call handler */
- larl %r1, external_new_code
- stg %r1, 0x1b8
- larl %r1, external_new_mask
- mvc 0x1b0(8),0(%r1)
- /* load enabled wait PSW */
- larl %r1, enabled_wait_psw
- lpswe 0(%r1)
+ larl %r1, external_new_psw
+ lghi %r2, 0x1b0
+ /* Is the BIOS' external new PSW already set? */
+ clc 0(16, %r1), 0(%r2)
+ je load_ewait
+ /* No, save old PSW and write BIOS PSW */
+ larl %r3, psw_save_ext
+ mvc 0(16, %r3), 0x1b0
+ mvc 0x1b0(16),0(%r1)
+ j load_ewait
/*
* void consume_io_int(void)
@@ -84,11 +97,20 @@ consume_io_int:
oi 4(%r15), 0xff
lctlg %c6,%c6,0(%r15)
/* prepare i/o call handler */
- larl %r1, io_new_code
- stg %r1, 0x1f8
- larl %r1, io_new_mask
- mvc 0x1f0(8),0(%r1)
- /* load enabled wait PSW */
+ larl %r1, io_new_psw
+ lghi %r2, 0x1f0
+ /* Is the BIOS' PSW already set? */
+ larl %r3, load_ewait
+ clc 0(16, %r1), 0(%r2)
+ bcr 8, %r3
+ /* No, save old PSW and write BIOS PSW */
+ larl %r3, psw_save_io
+ mvc 0(16, %r3), 0x1f0
+ mvc 0x1f0(16),0(%r1)
+ j load_ewait
+
+load_ewait:
+ /* PSW is the correct one, time to load the enabled wait PSW */
larl %r1, enabled_wait_psw
lpswe 0(%r1)
@@ -107,11 +129,17 @@ io_new_code:
br %r14
.align 8
+ .globl psw_save_io
+ .globl psw_save_ext
disabled_wait_psw:
.quad 0x0002000180000000,0x0000000000000000
enabled_wait_psw:
.quad 0x0302000180000000,0x0000000000000000
-external_new_mask:
- .quad 0x0000000180000000
-io_new_mask:
- .quad 0x0000000180000000
+external_new_psw:
+ .quad 0x0000000180000000,0
+io_new_psw:
+ .quad 0x0000000180000000,0
+psw_save_io:
+ .quad 0,0
+psw_save_ext:
+ .quad 0,0
--
2.25.1
next prev parent reply other threads:[~2020-08-27 9:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-27 9:31 [PATCH v2 0/4] pc-bios: s390x: Cleanup part 2 Janosch Frank
2020-08-27 9:31 ` [PATCH v2 1/4] pc-bios: s390x: Fix bootmap.c zipl component entry data handling Janosch Frank
2020-08-27 9:31 ` [PATCH v2 2/4] pc-bios: s390x: Use reset PSW if avaliable Janosch Frank
2020-08-27 12:43 ` Thomas Huth
2020-08-27 9:31 ` Janosch Frank [this message]
2020-08-27 12:52 ` [PATCH RFC v2 3/4] pc-bios: s390x: Save io and external new PSWs before overwriting them Thomas Huth
2020-08-27 14:30 ` Janosch Frank
2020-08-27 16:16 ` Thomas Huth
2020-08-27 9:31 ` [PATCH v2 4/4] pc-bios: s390x: Go into disabled wait when encountering a PGM exception Janosch Frank
2020-08-31 8:23 ` Christian Borntraeger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200827093152.3026-4-frankja@linux.ibm.com \
--to=frankja@linux.ibm.com \
--cc=borntraeger@de.ibm.com \
--cc=cohuck@redhat.com \
--cc=david@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=thuth@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).