From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
peter.maydell@linaro.org
Subject: [PULL 11/76] target/microblaze: Split out EDR from env->sregs
Date: Mon, 31 Aug 2020 09:04:56 -0700 [thread overview]
Message-ID: <20200831160601.833692-12-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200831160601.833692-1-richard.henderson@linaro.org>
Finish eliminating the sregs array in favor of individual members.
Does not correct the width of EDR, yet.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/cpu.h | 2 +-
linux-user/elfload.c | 9 ++++++---
target/microblaze/gdbstub.c | 4 ++--
target/microblaze/translate.c | 16 +++-------------
4 files changed, 12 insertions(+), 19 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index deddb47abb..610ddfb719 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -242,7 +242,7 @@ struct CPUMBState {
uint64_t esr;
uint64_t fsr;
uint64_t btr;
- uint64_t sregs[14];
+ uint64_t edr;
float_status fp_status;
/* Stack protectors. Yes, it's a hw feature. */
uint32_t slr, shr;
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 69936dcd45..58b3f4ef4d 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -1038,9 +1038,12 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMBState *env
(*regs)[pos++] = tswapreg(env->regs[i]);
}
- for (i = 0; i < 6; i++) {
- (*regs)[pos++] = tswapreg(env->sregs[i]);
- }
+ (*regs)[pos++] = tswapreg(env->pc);
+ (*regs)[pos++] = tswapreg(env->msr);
+ (*regs)[pos++] = 0;
+ (*regs)[pos++] = tswapreg(env->ear);
+ (*regs)[pos++] = 0;
+ (*regs)[pos++] = tswapreg(env->esr);
}
#endif /* TARGET_MICROBLAZE */
diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c
index cde8c169bf..9cba9d2215 100644
--- a/target/microblaze/gdbstub.c
+++ b/target/microblaze/gdbstub.c
@@ -81,7 +81,7 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
val = env->pvr.regs[n - GDB_PVR0];
break;
case GDB_EDR:
- val = env->sregs[SR_EDR];
+ val = env->edr;
break;
case GDB_SLR:
val = env->slr;
@@ -137,7 +137,7 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
env->pvr.regs[n - GDB_PVR0] = tmp;
break;
case GDB_EDR:
- env->sregs[SR_EDR] = tmp;
+ env->edr = tmp;
break;
case GDB_SLR:
env->slr = tmp;
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 469e1f103a..7d307e6b48 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -103,12 +103,6 @@ static const char *regnames[] =
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
};
-static const char *special_regnames[] =
-{
- "rpc", "rmsr", "sr2", "rear", "sr4", "resr", "sr6", "rfsr",
- "sr8", "sr9", "sr10", "rbtr", "sr12", "redr"
-};
-
static inline void t_sync_flags(DisasContext *dc)
{
/* Synch the tb dependent flags between translator and runtime. */
@@ -1828,7 +1822,7 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)
/* Registers that aren't modeled are reported as 0 */
qemu_fprintf(f, "redr=%" PRIx64 " rpid=0 rzpr=0 rtlbx=0 rtlbsx=0 "
- "rtlblo=0 rtlbhi=0\n", env->sregs[SR_EDR]);
+ "rtlblo=0 rtlbhi=0\n", env->edr);
qemu_fprintf(f, "slr=%x shr=%x\n", env->slr, env->shr);
for (i = 0; i < 32; i++) {
qemu_fprintf(f, "r%2.2d=%8.8x ", i, env->regs[i]);
@@ -1881,12 +1875,8 @@ void mb_tcg_init(void)
tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, fsr), "rfsr");
cpu_SR[SR_BTR] =
tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, btr), "rbtr");
-
- for (i = SR_BTR + 1; i < ARRAY_SIZE(cpu_SR); i++) {
- cpu_SR[i] = tcg_global_mem_new_i64(cpu_env,
- offsetof(CPUMBState, sregs[i]),
- special_regnames[i]);
- }
+ cpu_SR[SR_EDR] =
+ tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, edr), "redr");
}
void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb,
--
2.25.1
next prev parent reply other threads:[~2020-08-31 16:12 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-31 16:04 [PULL 00/76] target/microblaze improvements Richard Henderson
2020-08-31 16:04 ` [PULL 01/76] tests/tcg: Add microblaze to arches filter Richard Henderson
2020-08-31 16:04 ` [PULL 02/76] tests/tcg: Do not require FE_TOWARDZERO Richard Henderson
2020-08-31 16:04 ` [PULL 03/76] tests/tcg: Do not require FE_* exception bits Richard Henderson
2020-08-31 16:04 ` [PULL 04/76] target/microblaze: Tidy gdbstub Richard Henderson
2020-08-31 16:04 ` [PULL 05/76] target/microblaze: Split out PC from env->sregs Richard Henderson
2020-08-31 16:04 ` [PULL 06/76] target/microblaze: Split out MSR " Richard Henderson
2020-08-31 16:04 ` [PULL 07/76] target/microblaze: Split out EAR " Richard Henderson
2020-08-31 16:04 ` [PULL 08/76] target/microblaze: Split out ESR " Richard Henderson
2020-08-31 16:04 ` [PULL 09/76] target/microblaze: Split out FSR " Richard Henderson
2020-08-31 16:04 ` [PULL 10/76] target/microblaze: Split out BTR " Richard Henderson
2020-08-31 16:04 ` Richard Henderson [this message]
2020-08-31 16:04 ` [PULL 12/76] target/microblaze: Split the cpu_SR array Richard Henderson
2020-08-31 16:04 ` [PULL 13/76] target/microblaze: Fix width of PC and BTARGET Richard Henderson
2020-08-31 16:04 ` [PULL 14/76] target/microblaze: Fix width of MSR Richard Henderson
2020-08-31 16:05 ` [PULL 15/76] target/microblaze: Fix width of ESR Richard Henderson
2020-08-31 16:05 ` [PULL 16/76] target/microblaze: Fix width of FSR Richard Henderson
2020-08-31 16:05 ` [PULL 17/76] target/microblaze: Fix width of BTR Richard Henderson
2020-08-31 16:05 ` [PULL 18/76] target/microblaze: Fix width of EDR Richard Henderson
2020-08-31 16:05 ` [PULL 19/76] target/microblaze: Remove cpu_ear Richard Henderson
2020-08-31 16:05 ` [PULL 20/76] target/microblaze: Tidy raising of exceptions Richard Henderson
2020-08-31 16:05 ` [PULL 21/76] target/microblaze: Mark raise_exception as noreturn Richard Henderson
2020-08-31 16:05 ` [PULL 22/76] target/microblaze: Remove helper_debug and env->debug Richard Henderson
2020-08-31 16:05 ` [PULL 23/76] target/microblaze: Rename env_* tcg variables to cpu_* Richard Henderson
2020-08-31 16:05 ` [PULL 24/76] target/microblaze: Tidy mb_tcg_init Richard Henderson
2020-08-31 16:05 ` [PULL 25/76] target/microblaze: Split out MSR[C] to its own variable Richard Henderson
2020-08-31 16:05 ` [PULL 26/76] target/microblaze: Use DISAS_NORETURN Richard Henderson
2020-08-31 16:05 ` [PULL 27/76] target/microblaze: Check singlestep_enabled in gen_goto_tb Richard Henderson
2020-08-31 16:05 ` [PULL 28/76] target/microblaze: Convert to DisasContextBase Richard Henderson
2020-08-31 16:05 ` [PULL 29/76] target/microblaze: Convert to translator_loop Richard Henderson
2020-08-31 16:05 ` [PULL 30/76] target/microblaze: Remove SIM_COMPAT Richard Henderson
2020-08-31 16:05 ` [PULL 31/76] target/microblaze: Remove DISAS_GNU Richard Henderson
2020-08-31 16:05 ` [PULL 32/76] target/microblaze: Remove empty D macros Richard Henderson
2020-08-31 16:05 ` [PULL 33/76] target/microblaze: Remove LOG_DIS Richard Henderson
2020-08-31 16:05 ` [PULL 34/76] target/microblaze: Ensure imm constant is always available Richard Henderson
2020-08-31 16:05 ` [PULL 35/76] target/microblaze: Add decodetree infrastructure Richard Henderson
2020-08-31 16:05 ` [PULL 36/76] target/microblaze: Convert dec_add to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 37/76] target/microblaze: Convert dec_sub " Richard Henderson
2020-08-31 16:05 ` [PULL 38/76] target/microblaze: Implement cmp and cmpu inline Richard Henderson
2020-08-31 16:05 ` [PULL 39/76] target/microblaze: Convert dec_pattern to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 40/76] target/microblaze: Convert dec_and, dec_or, dec_xor " Richard Henderson
2020-08-31 16:05 ` [PULL 41/76] target/microblaze: Convert dec_mul " Richard Henderson
2020-08-31 16:05 ` [PULL 42/76] target/microblaze: Convert dec_div " Richard Henderson
2020-08-31 16:05 ` [PULL 43/76] target/microblaze: Unwind properly when raising divide-by-zero Richard Henderson
2020-08-31 16:05 ` [PULL 44/76] target/microblaze: Convert dec_bit to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 45/76] target/microblaze: Convert dec_barrel " Richard Henderson
2020-08-31 16:05 ` [PULL 46/76] target/microblaze: Convert dec_imm " Richard Henderson
2020-08-31 16:05 ` [PULL 47/76] target/microblaze: Convert dec_fpu " Richard Henderson
2020-08-31 16:05 ` [PULL 48/76] target/microblaze: Fix cpu unwind for fpu exceptions Richard Henderson
2020-08-31 16:05 ` [PULL 49/76] target/microblaze: Mark fpu helpers TCG_CALL_NO_WG Richard Henderson
2020-08-31 16:05 ` [PULL 50/76] target/microblaze: Replace MSR_EE_FLAG with MSR_EE Richard Henderson
2020-08-31 16:05 ` [PULL 51/76] target/microblaze: Cache mem_index in DisasContext Richard Henderson
2020-08-31 16:05 ` [PULL 52/76] target/microblaze: Fix cpu unwind for stackprot Richard Henderson
2020-08-31 16:05 ` [PULL 53/76] target/microblaze: Convert dec_load and dec_store to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 54/76] target/microblaze: Assert no overlap in flags making up tb_flags Richard Henderson
2020-08-31 16:05 ` [PULL 55/76] target/microblaze: Move bimm to BIMM_FLAG Richard Henderson
2020-08-31 16:05 ` [PULL 56/76] target/microblaze: Fix no-op mb_cpu_transaction_failed Richard Henderson
2020-08-31 16:05 ` [PULL 57/76] target/microblaze: Store "current" iflags in insn_start Richard Henderson
2020-08-31 16:05 ` [PULL 58/76] tcg: Add tcg_get_insn_start_param Richard Henderson
2020-08-31 16:05 ` [PULL 59/76] target/microblaze: Use cc->do_unaligned_access Richard Henderson
2020-08-31 16:05 ` [PULL 60/76] target/microblaze: Replace clear_imm with tb_flags_to_set Richard Henderson
2020-08-31 16:05 ` [PULL 61/76] target/microblaze: Replace delayed_branch " Richard Henderson
2020-08-31 16:05 ` [PULL 62/76] target/microblaze: Tidy mb_cpu_dump_state Richard Henderson
2020-08-31 16:05 ` [PULL 63/76] target/microblaze: Convert brk and brki to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 64/76] target/microblaze: Convert mbar " Richard Henderson
2020-08-31 16:05 ` [PULL 65/76] target/microblaze: Reorganize branching Richard Henderson
2020-08-31 16:05 ` [PULL 66/76] target/microblaze: Convert dec_br to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 67/76] target/microblaze: Convert dec_bcc " Richard Henderson
2020-08-31 16:05 ` [PULL 68/76] target/microblaze: Convert dec_rts " Richard Henderson
2020-08-31 16:05 ` [PULL 69/76] target/microblaze: Tidy do_rti, do_rtb, do_rte Richard Henderson
2020-08-31 16:05 ` [PULL 70/76] target/microblaze: Convert msrclr, msrset to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 71/76] target/microblaze: Convert dec_msr " Richard Henderson
2020-08-31 16:05 ` [PULL 72/76] target/microblaze: Convert dec_stream " Richard Henderson
2020-08-31 16:05 ` [PULL 73/76] target/microblaze: Remove last of old decoder Richard Henderson
2020-08-31 16:05 ` [PULL 74/76] target/microblaze: Remove cpu_R[0] Richard Henderson
2020-08-31 16:06 ` [PULL 75/76] target/microblaze: Add flags markup to some helpers Richard Henderson
2020-08-31 16:06 ` [PULL 76/76] target/microblaze: Reduce linux-user address space to 32-bit Richard Henderson
2020-09-01 0:21 ` [PULL 00/76] target/microblaze improvements no-reply
2020-09-01 0:32 ` no-reply
2020-09-01 12:17 ` Peter Maydell
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