From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
peter.maydell@linaro.org
Subject: [PULL 37/76] target/microblaze: Convert dec_sub to decodetree
Date: Mon, 31 Aug 2020 09:05:22 -0700 [thread overview]
Message-ID: <20200831160601.833692-38-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200831160601.833692-1-richard.henderson@linaro.org>
Use tcg_gen_add2_i32 for computing carry.
This removes the last use of helper_carry, so remove that.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/helper.h | 1 -
target/microblaze/insns.decode | 13 ++++
target/microblaze/op_helper.c | 16 -----
target/microblaze/translate.c | 110 ++++++++++++++++-----------------
4 files changed, 65 insertions(+), 75 deletions(-)
diff --git a/target/microblaze/helper.h b/target/microblaze/helper.h
index 9309142f8d..988abf7661 100644
--- a/target/microblaze/helper.h
+++ b/target/microblaze/helper.h
@@ -1,5 +1,4 @@
DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32)
-DEF_HELPER_FLAGS_3(carry, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
DEF_HELPER_2(cmp, i32, i32, i32)
DEF_HELPER_2(cmpu, i32, i32, i32)
diff --git a/target/microblaze/insns.decode b/target/microblaze/insns.decode
index 5f289a446c..a611cc83a7 100644
--- a/target/microblaze/insns.decode
+++ b/target/microblaze/insns.decode
@@ -40,3 +40,16 @@ addi 001000 ..... ..... ................ @typeb
addic 001010 ..... ..... ................ @typeb
addik 001100 ..... ..... ................ @typeb
addikc 001110 ..... ..... ................ @typeb
+
+cmp 000101 ..... ..... ..... 000 0000 0001 @typea
+cmpu 000101 ..... ..... ..... 000 0000 0011 @typea
+
+rsub 000001 ..... ..... ..... 000 0000 0000 @typea
+rsubc 000011 ..... ..... ..... 000 0000 0000 @typea
+rsubk 000101 ..... ..... ..... 000 0000 0000 @typea
+rsubkc 000111 ..... ..... ..... 000 0000 0000 @typea
+
+rsubi 001001 ..... ..... ................ @typeb
+rsubic 001011 ..... ..... ................ @typeb
+rsubik 001101 ..... ..... ................ @typeb
+rsubikc 001111 ..... ..... ................ @typeb
diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
index decdca0fd8..9bb6a2ad76 100644
--- a/target/microblaze/op_helper.c
+++ b/target/microblaze/op_helper.c
@@ -69,17 +69,6 @@ void helper_raise_exception(CPUMBState *env, uint32_t index)
cpu_loop_exit(cs);
}
-static inline uint32_t compute_carry(uint32_t a, uint32_t b, uint32_t cin)
-{
- uint32_t cout = 0;
-
- if ((b == ~0) && cin)
- cout = 1;
- else if ((~0 - a) < (b + cin))
- cout = 1;
- return cout;
-}
-
uint32_t helper_cmp(uint32_t a, uint32_t b)
{
uint32_t t;
@@ -100,11 +89,6 @@ uint32_t helper_cmpu(uint32_t a, uint32_t b)
return t;
}
-uint32_t helper_carry(uint32_t a, uint32_t b, uint32_t cf)
-{
- return compute_carry(a, b, cf);
-}
-
static inline int div_prepare(CPUMBState *env, uint32_t a, uint32_t b)
{
MicroBlazeCPU *cpu = env_archcpu(env);
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index de822bd7b7..0e7d24ddca 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -327,6 +327,58 @@ DO_TYPEBV(addic, true, gen_addc)
DO_TYPEBI(addik, false, tcg_gen_addi_i32)
DO_TYPEBV(addikc, true, gen_addkc)
+DO_TYPEA(cmp, false, gen_helper_cmp)
+DO_TYPEA(cmpu, false, gen_helper_cmpu)
+
+/* No input carry, but output carry. */
+static void gen_rsub(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
+{
+ tcg_gen_setcond_i32(TCG_COND_GEU, cpu_msr_c, inb, ina);
+ tcg_gen_sub_i32(out, inb, ina);
+}
+
+/* Input and output carry. */
+static void gen_rsubc(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
+{
+ TCGv_i32 zero = tcg_const_i32(0);
+ TCGv_i32 tmp = tcg_temp_new_i32();
+
+ tcg_gen_not_i32(tmp, ina);
+ tcg_gen_add2_i32(tmp, cpu_msr_c, tmp, zero, cpu_msr_c, zero);
+ tcg_gen_add2_i32(out, cpu_msr_c, tmp, cpu_msr_c, inb, zero);
+
+ tcg_temp_free_i32(zero);
+ tcg_temp_free_i32(tmp);
+}
+
+/* No input or output carry. */
+static void gen_rsubk(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
+{
+ tcg_gen_sub_i32(out, inb, ina);
+}
+
+/* Input carry, no output carry. */
+static void gen_rsubkc(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
+{
+ TCGv_i32 nota = tcg_temp_new_i32();
+
+ tcg_gen_not_i32(nota, ina);
+ tcg_gen_add_i32(out, inb, nota);
+ tcg_gen_add_i32(out, out, cpu_msr_c);
+
+ tcg_temp_free_i32(nota);
+}
+
+DO_TYPEA(rsub, true, gen_rsub)
+DO_TYPEA(rsubc, true, gen_rsubc)
+DO_TYPEA(rsubk, false, gen_rsubk)
+DO_TYPEA(rsubkc, true, gen_rsubkc)
+
+DO_TYPEBV(rsubi, true, gen_rsub)
+DO_TYPEBV(rsubic, true, gen_rsubc)
+DO_TYPEBV(rsubik, false, gen_rsubk)
+DO_TYPEBV(rsubikc, true, gen_rsubkc)
+
static bool trans_zero(DisasContext *dc, arg_zero *arg)
{
/* If opcode_0_illegal, trap. */
@@ -341,63 +393,6 @@ static bool trans_zero(DisasContext *dc, arg_zero *arg)
return false;
}
-static void dec_sub(DisasContext *dc)
-{
- unsigned int u, cmp, k, c;
- TCGv_i32 cf, na;
-
- u = dc->imm & 2;
- k = dc->opcode & 4;
- c = dc->opcode & 2;
- cmp = (dc->imm & 1) && (!dc->type_b) && k;
-
- if (cmp) {
- if (dc->rd) {
- if (u)
- gen_helper_cmpu(cpu_R[dc->rd], cpu_R[dc->ra], cpu_R[dc->rb]);
- else
- gen_helper_cmp(cpu_R[dc->rd], cpu_R[dc->ra], cpu_R[dc->rb]);
- }
- return;
- }
-
- /* Take care of the easy cases first. */
- if (k) {
- /* k - keep carry, no need to update MSR. */
- /* If rd == r0, it's a nop. */
- if (dc->rd) {
- tcg_gen_sub_i32(cpu_R[dc->rd], *(dec_alu_op_b(dc)), cpu_R[dc->ra]);
-
- if (c) {
- /* c - Add carry into the result. */
- tcg_gen_add_i32(cpu_R[dc->rd], cpu_R[dc->rd], cpu_msr_c);
- }
- }
- return;
- }
-
- /* From now on, we can assume k is zero. So we need to update MSR. */
- /* Extract carry. And complement a into na. */
- cf = tcg_temp_new_i32();
- na = tcg_temp_new_i32();
- if (c) {
- tcg_gen_mov_i32(cf, cpu_msr_c);
- } else {
- tcg_gen_movi_i32(cf, 1);
- }
-
- /* d = b + ~a + c. carry defaults to 1. */
- tcg_gen_not_i32(na, cpu_R[dc->ra]);
-
- gen_helper_carry(cpu_msr_c, na, *(dec_alu_op_b(dc)), cf);
- if (dc->rd) {
- tcg_gen_add_i32(cpu_R[dc->rd], na, *(dec_alu_op_b(dc)));
- tcg_gen_add_i32(cpu_R[dc->rd], cpu_R[dc->rd], cf);
- }
- tcg_temp_free_i32(cf);
- tcg_temp_free_i32(na);
-}
-
static void dec_pattern(DisasContext *dc)
{
unsigned int mode;
@@ -1597,7 +1592,6 @@ static struct decoder_info {
};
void (*dec)(DisasContext *dc);
} decinfo[] = {
- {DEC_SUB, dec_sub},
{DEC_AND, dec_and},
{DEC_XOR, dec_xor},
{DEC_OR, dec_or},
--
2.25.1
next prev parent reply other threads:[~2020-08-31 16:19 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-31 16:04 [PULL 00/76] target/microblaze improvements Richard Henderson
2020-08-31 16:04 ` [PULL 01/76] tests/tcg: Add microblaze to arches filter Richard Henderson
2020-08-31 16:04 ` [PULL 02/76] tests/tcg: Do not require FE_TOWARDZERO Richard Henderson
2020-08-31 16:04 ` [PULL 03/76] tests/tcg: Do not require FE_* exception bits Richard Henderson
2020-08-31 16:04 ` [PULL 04/76] target/microblaze: Tidy gdbstub Richard Henderson
2020-08-31 16:04 ` [PULL 05/76] target/microblaze: Split out PC from env->sregs Richard Henderson
2020-08-31 16:04 ` [PULL 06/76] target/microblaze: Split out MSR " Richard Henderson
2020-08-31 16:04 ` [PULL 07/76] target/microblaze: Split out EAR " Richard Henderson
2020-08-31 16:04 ` [PULL 08/76] target/microblaze: Split out ESR " Richard Henderson
2020-08-31 16:04 ` [PULL 09/76] target/microblaze: Split out FSR " Richard Henderson
2020-08-31 16:04 ` [PULL 10/76] target/microblaze: Split out BTR " Richard Henderson
2020-08-31 16:04 ` [PULL 11/76] target/microblaze: Split out EDR " Richard Henderson
2020-08-31 16:04 ` [PULL 12/76] target/microblaze: Split the cpu_SR array Richard Henderson
2020-08-31 16:04 ` [PULL 13/76] target/microblaze: Fix width of PC and BTARGET Richard Henderson
2020-08-31 16:04 ` [PULL 14/76] target/microblaze: Fix width of MSR Richard Henderson
2020-08-31 16:05 ` [PULL 15/76] target/microblaze: Fix width of ESR Richard Henderson
2020-08-31 16:05 ` [PULL 16/76] target/microblaze: Fix width of FSR Richard Henderson
2020-08-31 16:05 ` [PULL 17/76] target/microblaze: Fix width of BTR Richard Henderson
2020-08-31 16:05 ` [PULL 18/76] target/microblaze: Fix width of EDR Richard Henderson
2020-08-31 16:05 ` [PULL 19/76] target/microblaze: Remove cpu_ear Richard Henderson
2020-08-31 16:05 ` [PULL 20/76] target/microblaze: Tidy raising of exceptions Richard Henderson
2020-08-31 16:05 ` [PULL 21/76] target/microblaze: Mark raise_exception as noreturn Richard Henderson
2020-08-31 16:05 ` [PULL 22/76] target/microblaze: Remove helper_debug and env->debug Richard Henderson
2020-08-31 16:05 ` [PULL 23/76] target/microblaze: Rename env_* tcg variables to cpu_* Richard Henderson
2020-08-31 16:05 ` [PULL 24/76] target/microblaze: Tidy mb_tcg_init Richard Henderson
2020-08-31 16:05 ` [PULL 25/76] target/microblaze: Split out MSR[C] to its own variable Richard Henderson
2020-08-31 16:05 ` [PULL 26/76] target/microblaze: Use DISAS_NORETURN Richard Henderson
2020-08-31 16:05 ` [PULL 27/76] target/microblaze: Check singlestep_enabled in gen_goto_tb Richard Henderson
2020-08-31 16:05 ` [PULL 28/76] target/microblaze: Convert to DisasContextBase Richard Henderson
2020-08-31 16:05 ` [PULL 29/76] target/microblaze: Convert to translator_loop Richard Henderson
2020-08-31 16:05 ` [PULL 30/76] target/microblaze: Remove SIM_COMPAT Richard Henderson
2020-08-31 16:05 ` [PULL 31/76] target/microblaze: Remove DISAS_GNU Richard Henderson
2020-08-31 16:05 ` [PULL 32/76] target/microblaze: Remove empty D macros Richard Henderson
2020-08-31 16:05 ` [PULL 33/76] target/microblaze: Remove LOG_DIS Richard Henderson
2020-08-31 16:05 ` [PULL 34/76] target/microblaze: Ensure imm constant is always available Richard Henderson
2020-08-31 16:05 ` [PULL 35/76] target/microblaze: Add decodetree infrastructure Richard Henderson
2020-08-31 16:05 ` [PULL 36/76] target/microblaze: Convert dec_add to decodetree Richard Henderson
2020-08-31 16:05 ` Richard Henderson [this message]
2020-08-31 16:05 ` [PULL 38/76] target/microblaze: Implement cmp and cmpu inline Richard Henderson
2020-08-31 16:05 ` [PULL 39/76] target/microblaze: Convert dec_pattern to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 40/76] target/microblaze: Convert dec_and, dec_or, dec_xor " Richard Henderson
2020-08-31 16:05 ` [PULL 41/76] target/microblaze: Convert dec_mul " Richard Henderson
2020-08-31 16:05 ` [PULL 42/76] target/microblaze: Convert dec_div " Richard Henderson
2020-08-31 16:05 ` [PULL 43/76] target/microblaze: Unwind properly when raising divide-by-zero Richard Henderson
2020-08-31 16:05 ` [PULL 44/76] target/microblaze: Convert dec_bit to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 45/76] target/microblaze: Convert dec_barrel " Richard Henderson
2020-08-31 16:05 ` [PULL 46/76] target/microblaze: Convert dec_imm " Richard Henderson
2020-08-31 16:05 ` [PULL 47/76] target/microblaze: Convert dec_fpu " Richard Henderson
2020-08-31 16:05 ` [PULL 48/76] target/microblaze: Fix cpu unwind for fpu exceptions Richard Henderson
2020-08-31 16:05 ` [PULL 49/76] target/microblaze: Mark fpu helpers TCG_CALL_NO_WG Richard Henderson
2020-08-31 16:05 ` [PULL 50/76] target/microblaze: Replace MSR_EE_FLAG with MSR_EE Richard Henderson
2020-08-31 16:05 ` [PULL 51/76] target/microblaze: Cache mem_index in DisasContext Richard Henderson
2020-08-31 16:05 ` [PULL 52/76] target/microblaze: Fix cpu unwind for stackprot Richard Henderson
2020-08-31 16:05 ` [PULL 53/76] target/microblaze: Convert dec_load and dec_store to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 54/76] target/microblaze: Assert no overlap in flags making up tb_flags Richard Henderson
2020-08-31 16:05 ` [PULL 55/76] target/microblaze: Move bimm to BIMM_FLAG Richard Henderson
2020-08-31 16:05 ` [PULL 56/76] target/microblaze: Fix no-op mb_cpu_transaction_failed Richard Henderson
2020-08-31 16:05 ` [PULL 57/76] target/microblaze: Store "current" iflags in insn_start Richard Henderson
2020-08-31 16:05 ` [PULL 58/76] tcg: Add tcg_get_insn_start_param Richard Henderson
2020-08-31 16:05 ` [PULL 59/76] target/microblaze: Use cc->do_unaligned_access Richard Henderson
2020-08-31 16:05 ` [PULL 60/76] target/microblaze: Replace clear_imm with tb_flags_to_set Richard Henderson
2020-08-31 16:05 ` [PULL 61/76] target/microblaze: Replace delayed_branch " Richard Henderson
2020-08-31 16:05 ` [PULL 62/76] target/microblaze: Tidy mb_cpu_dump_state Richard Henderson
2020-08-31 16:05 ` [PULL 63/76] target/microblaze: Convert brk and brki to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 64/76] target/microblaze: Convert mbar " Richard Henderson
2020-08-31 16:05 ` [PULL 65/76] target/microblaze: Reorganize branching Richard Henderson
2020-08-31 16:05 ` [PULL 66/76] target/microblaze: Convert dec_br to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 67/76] target/microblaze: Convert dec_bcc " Richard Henderson
2020-08-31 16:05 ` [PULL 68/76] target/microblaze: Convert dec_rts " Richard Henderson
2020-08-31 16:05 ` [PULL 69/76] target/microblaze: Tidy do_rti, do_rtb, do_rte Richard Henderson
2020-08-31 16:05 ` [PULL 70/76] target/microblaze: Convert msrclr, msrset to decodetree Richard Henderson
2020-08-31 16:05 ` [PULL 71/76] target/microblaze: Convert dec_msr " Richard Henderson
2020-08-31 16:05 ` [PULL 72/76] target/microblaze: Convert dec_stream " Richard Henderson
2020-08-31 16:05 ` [PULL 73/76] target/microblaze: Remove last of old decoder Richard Henderson
2020-08-31 16:05 ` [PULL 74/76] target/microblaze: Remove cpu_R[0] Richard Henderson
2020-08-31 16:06 ` [PULL 75/76] target/microblaze: Add flags markup to some helpers Richard Henderson
2020-08-31 16:06 ` [PULL 76/76] target/microblaze: Reduce linux-user address space to 32-bit Richard Henderson
2020-09-01 0:21 ` [PULL 00/76] target/microblaze improvements no-reply
2020-09-01 0:32 ` no-reply
2020-09-01 12:17 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200831160601.833692-38-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=edgar.iglesias@xilinx.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).