From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 01/47] target/arm: Remove local definitions of float constants
Date: Tue, 1 Sep 2020 16:17:37 +0100 [thread overview]
Message-ID: <20200901151823.29785-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200901151823.29785-1-peter.maydell@linaro.org>
In several places the target/arm code defines local float constants
for 2, 3 and 1.5, which are also provided by include/fpu/softfloat.h.
Remove the unnecessary local duplicate versions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-2-peter.maydell@linaro.org
---
target/arm/helper-a64.c | 11 -----------
target/arm/translate-sve.c | 4 ----
target/arm/vfp_helper.c | 4 ----
3 files changed, 19 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 8682630ff6c..030821489b3 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -234,17 +234,6 @@ uint64_t HELPER(neon_cgt_f64)(float64 a, float64 b, void *fpstp)
* versions, these do a fully fused multiply-add or
* multiply-add-and-halve.
*/
-#define float16_two make_float16(0x4000)
-#define float16_three make_float16(0x4200)
-#define float16_one_point_five make_float16(0x3e00)
-
-#define float32_two make_float32(0x40000000)
-#define float32_three make_float32(0x40400000)
-#define float32_one_point_five make_float32(0x3fc00000)
-
-#define float64_two make_float64(0x4000000000000000ULL)
-#define float64_three make_float64(0x4008000000000000ULL)
-#define float64_one_point_five make_float64(0x3FF8000000000000ULL)
uint32_t HELPER(recpsf_f16)(uint32_t a, uint32_t b, void *fpstp)
{
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 15ad6c7d323..e4cd6b62517 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -3803,10 +3803,6 @@ static bool trans_##NAME##_zpzi(DisasContext *s, arg_rpri_esz *a) \
return true; \
}
-#define float16_two make_float16(0x4000)
-#define float32_two make_float32(0x40000000)
-#define float64_two make_float64(0x4000000000000000ULL)
-
DO_FP_IMM(FADD, fadds, half, one)
DO_FP_IMM(FSUB, fsubs, half, one)
DO_FP_IMM(FMUL, fmuls, half, two)
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 64266ece620..02ab8d7f2d8 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -582,10 +582,6 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *fpstp, uint32_t ahp_mode)
return r;
}
-#define float32_two make_float32(0x40000000)
-#define float32_three make_float32(0x40400000)
-#define float32_one_point_five make_float32(0x3fc00000)
-
float32 HELPER(recps_f32)(CPUARMState *env, float32 a, float32 b)
{
float_status *s = &env->vfp.standard_fp_status;
--
2.20.1
next prev parent reply other threads:[~2020-09-01 15:26 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-01 15:17 [PULL 00/47] target-arm queue Peter Maydell
2020-09-01 15:17 ` Peter Maydell [this message]
2020-09-01 15:17 ` [PULL 02/47] target/arm: Use correct ID register check for aa32_fp16_arith Peter Maydell
2020-09-01 15:17 ` [PULL 03/47] target/arm: Implement VFP fp16 for VFP_BINOP operations Peter Maydell
2020-09-01 15:17 ` [PULL 04/47] target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL Peter Maydell
2020-09-01 15:17 ` [PULL 05/47] target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS Peter Maydell
2020-09-01 15:17 ` [PULL 06/47] target/arm: Implement VFP fp16 for fused-multiply-add Peter Maydell
2020-09-01 15:17 ` [PULL 07/47] target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp() Peter Maydell
2020-09-01 15:17 ` [PULL 08/47] target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT Peter Maydell
2020-09-01 15:17 ` [PULL 09/47] target/arm: Implement VFP fp16 for VMOV immediate Peter Maydell
2020-09-01 15:17 ` [PULL 10/47] target/arm: Implement VFP fp16 VCMP Peter Maydell
2020-09-01 15:17 ` [PULL 11/47] target/arm: Implement VFP fp16 VLDR and VSTR Peter Maydell
2020-09-01 15:17 ` [PULL 12/47] target/arm: Implement VFP fp16 VCVT between float and integer Peter Maydell
2020-09-01 15:17 ` [PULL 13/47] target/arm: Make VFP_CONV_FIX macros take separate float type and float size Peter Maydell
2020-09-01 15:17 ` [PULL 14/47] target/arm: Use macros instead of open-coding fp16 conversion helpers Peter Maydell
2020-09-01 15:17 ` [PULL 15/47] target/arm: Implement VFP fp16 VCVT between float and fixed-point Peter Maydell
2020-09-01 15:17 ` [PULL 16/47] target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode Peter Maydell
2020-09-01 15:17 ` [PULL 17/47] target/arm: Implement VFP fp16 VSEL Peter Maydell
2020-09-01 15:17 ` [PULL 18/47] target/arm: Implement VFP fp16 VRINT* Peter Maydell
2020-09-01 15:17 ` [PULL 19/47] target/arm: Implement new VFP fp16 insn VINS Peter Maydell
2020-09-01 15:17 ` [PULL 20/47] target/arm: Implement new VFP fp16 insn VMOVX Peter Maydell
2020-09-01 15:17 ` [PULL 21/47] target/arm: Implement VFP fp16 VMOV between gp and halfprec registers Peter Maydell
2020-09-01 15:17 ` [PULL 22/47] target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMUL Peter Maydell
2020-09-01 15:17 ` [PULL 23/47] target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvec Peter Maydell
2020-09-01 15:18 ` [PULL 24/47] target/arm: Implement fp16 for Neon VABS, VNEG of floats Peter Maydell
2020-09-01 15:18 ` [PULL 25/47] target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisons Peter Maydell
2020-09-01 15:18 ` [PULL 26/47] target/arm: Implement fp16 for VACGE, VACGT Peter Maydell
2020-09-01 15:18 ` [PULL 27/47] target/arm: Implement fp16 for Neon VMAX, VMIN Peter Maydell
2020-09-01 15:18 ` [PULL 28/47] target/arm: Implement fp16 for Neon VMAXNM, VMINNM Peter Maydell
2020-09-01 15:18 ` [PULL 29/47] target/arm: Implement fp16 for Neon VMLA, VMLS operations Peter Maydell
2020-09-01 15:18 ` [PULL 30/47] target/arm: Implement fp16 for Neon VFMA, VMFS Peter Maydell
2020-09-01 15:18 ` [PULL 31/47] target/arm: Implement fp16 for Neon fp compare-vs-0 Peter Maydell
2020-09-01 15:18 ` [PULL 32/47] target/arm: Implement fp16 for Neon VRECPS Peter Maydell
2020-09-01 15:18 ` [PULL 33/47] target/arm: Implement fp16 for Neon VRSQRTS Peter Maydell
2020-09-01 15:18 ` [PULL 34/47] target/arm: Implement fp16 for Neon pairwise fp ops Peter Maydell
2020-09-01 15:18 ` [PULL 35/47] target/arm: Implement fp16 for Neon float-integer VCVT Peter Maydell
2020-09-01 15:18 ` [PULL 36/47] target/arm: Convert Neon VCVT fixed-point to gvec Peter Maydell
2020-09-01 15:18 ` [PULL 37/47] target/arm: Implement fp16 for Neon VCVT fixed-point Peter Maydell
2020-09-01 15:18 ` [PULL 38/47] target/arm: Implement fp16 for Neon VCVT with rounding modes Peter Maydell
2020-09-01 15:18 ` [PULL 39/47] target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode Peter Maydell
2020-09-01 15:18 ` [PULL 40/47] target/arm: Implement fp16 for Neon VRINTX Peter Maydell
2020-09-01 15:18 ` [PULL 41/47] target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations Peter Maydell
2020-09-01 15:18 ` [PULL 42/47] target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations Peter Maydell
2020-09-01 15:18 ` [PULL 43/47] target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS Peter Maydell
2020-09-01 15:18 ` [PULL 44/47] target/arm: Enable FP16 in '-cpu max' Peter Maydell
2020-09-01 15:18 ` [PULL 45/47] hw/arm/sbsa-ref: add "reg" property to DT cpu nodes Peter Maydell
2020-09-01 15:18 ` [PULL 46/47] hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref Peter Maydell
2020-09-01 15:18 ` [PULL 47/47] hw/arm/sbsa-ref : Add embedded controller in secure memory Peter Maydell
2020-09-01 21:47 ` [PULL 00/47] target-arm queue Peter Maydell
2020-09-02 10:16 ` no-reply
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