From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
peter.maydell@linaro.org
Subject: [PULL v2 58/76] tcg: Add tcg_get_insn_start_param
Date: Tue, 1 Sep 2020 08:20:54 -0700 [thread overview]
Message-ID: <20200901152054.922595-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200901152054.922595-1-richard.henderson@linaro.org>
MicroBlaze will shortly need to update a parameter in place.
Add an interface to read to match that for write.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index d40c925d04..53ce94c2c5 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -777,11 +777,26 @@ static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t)
}
#endif
+static inline TCGArg tcg_get_insn_param(TCGOp *op, int arg)
+{
+ return op->args[arg];
+}
+
static inline void tcg_set_insn_param(TCGOp *op, int arg, TCGArg v)
{
op->args[arg] = v;
}
+static inline target_ulong tcg_get_insn_start_param(TCGOp *op, int arg)
+{
+#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
+ return tcg_get_insn_param(op, arg);
+#else
+ return tcg_get_insn_param(op, arg * 2) |
+ ((uint64_t)tcg_get_insn_param(op, arg * 2 + 1) << 32);
+#endif
+}
+
static inline void tcg_set_insn_start_param(TCGOp *op, int arg, target_ulong v)
{
#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
--
2.25.1
next prev parent reply other threads:[~2020-09-01 15:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-01 15:20 [PULL v2 00/76] target/microblaze improvements Richard Henderson
2020-09-01 15:20 ` Richard Henderson [this message]
2020-09-02 14:26 ` Peter Maydell
2020-09-02 19:09 ` Thomas Huth
2020-09-02 23:11 ` Richard Henderson
2020-09-03 2:12 ` Richard Henderson
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