From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Laurent Vivier" <lvivier@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Thomas Huth" <thuth@redhat.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Eduardo Habkost" <ehabkost@redhat.com>,
kvm@vger.kernel.org, "Michael S. Tsirkin" <mst@redhat.com>,
"Andrew Jeffery" <andrew@aj.id.au>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Jason Wang" <jasowang@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
"Joel Stanley" <joel@jms.id.au>,
qemu-trivial@nongnu.org, qemu-arm@nongnu.org,
"Cédric Le Goater" <clg@kaod.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Richard Henderson" <rth@twiddle.net>
Subject: [PATCH 1/6] hw/ssi/aspeed_smc: Rename max_slaves as max_devices
Date: Thu, 10 Sep 2020 09:01:26 +0200 [thread overview]
Message-ID: <20200910070131.435543-2-philmd@redhat.com> (raw)
In-Reply-To: <20200910070131.435543-1-philmd@redhat.com>
In order to use inclusive terminology, rename max_slaves
as max_devices.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/ssi/aspeed_smc.h | 2 +-
hw/ssi/aspeed_smc.c | 40 ++++++++++++++++++-------------------
2 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 6fbbb238f15..52ae34e38d1 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -42,7 +42,7 @@ typedef struct AspeedSMCController {
uint8_t r_timings;
uint8_t nregs_timings;
uint8_t conf_enable_w0;
- uint8_t max_slaves;
+ uint8_t max_devices;
const AspeedSegments *segments;
hwaddr flash_window_base;
uint32_t flash_window_size;
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 795784e5f36..8219272016c 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -259,7 +259,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_TIMINGS,
.nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
- .max_slaves = 1,
+ .max_devices = 1,
.segments = aspeed_segments_legacy,
.flash_window_base = ASPEED_SOC_SMC_FLASH_BASE,
.flash_window_size = 0x6000000,
@@ -275,7 +275,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_TIMINGS,
.nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
- .max_slaves = 5,
+ .max_devices = 5,
.segments = aspeed_segments_fmc,
.flash_window_base = ASPEED_SOC_FMC_FLASH_BASE,
.flash_window_size = 0x10000000,
@@ -293,7 +293,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_SPI_TIMINGS,
.nregs_timings = 1,
.conf_enable_w0 = SPI_CONF_ENABLE_W0,
- .max_slaves = 1,
+ .max_devices = 1,
.segments = aspeed_segments_spi,
.flash_window_base = ASPEED_SOC_SPI_FLASH_BASE,
.flash_window_size = 0x10000000,
@@ -309,7 +309,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_TIMINGS,
.nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
- .max_slaves = 3,
+ .max_devices = 3,
.segments = aspeed_segments_ast2500_fmc,
.flash_window_base = ASPEED_SOC_FMC_FLASH_BASE,
.flash_window_size = 0x10000000,
@@ -327,7 +327,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_TIMINGS,
.nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
- .max_slaves = 2,
+ .max_devices = 2,
.segments = aspeed_segments_ast2500_spi1,
.flash_window_base = ASPEED_SOC_SPI_FLASH_BASE,
.flash_window_size = 0x8000000,
@@ -343,7 +343,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_TIMINGS,
.nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
- .max_slaves = 2,
+ .max_devices = 2,
.segments = aspeed_segments_ast2500_spi2,
.flash_window_base = ASPEED_SOC_SPI2_FLASH_BASE,
.flash_window_size = 0x8000000,
@@ -359,7 +359,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_TIMINGS,
.nregs_timings = 1,
.conf_enable_w0 = CONF_ENABLE_W0,
- .max_slaves = 3,
+ .max_devices = 3,
.segments = aspeed_segments_ast2600_fmc,
.flash_window_base = ASPEED26_SOC_FMC_FLASH_BASE,
.flash_window_size = 0x10000000,
@@ -377,7 +377,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_TIMINGS,
.nregs_timings = 2,
.conf_enable_w0 = CONF_ENABLE_W0,
- .max_slaves = 2,
+ .max_devices = 2,
.segments = aspeed_segments_ast2600_spi1,
.flash_window_base = ASPEED26_SOC_SPI_FLASH_BASE,
.flash_window_size = 0x10000000,
@@ -395,7 +395,7 @@ static const AspeedSMCController controllers[] = {
.r_timings = R_TIMINGS,
.nregs_timings = 3,
.conf_enable_w0 = CONF_ENABLE_W0,
- .max_slaves = 3,
+ .max_devices = 3,
.segments = aspeed_segments_ast2600_spi2,
.flash_window_base = ASPEED26_SOC_SPI2_FLASH_BASE,
.flash_window_size = 0x10000000,
@@ -476,7 +476,7 @@ static bool aspeed_smc_flash_overlap(const AspeedSMCState *s,
AspeedSegments seg;
int i;
- for (i = 0; i < s->ctrl->max_slaves; i++) {
+ for (i = 0; i < s->ctrl->max_devices; i++) {
if (i == cs) {
continue;
}
@@ -537,7 +537,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
*/
if ((s->ctrl->segments == aspeed_segments_ast2500_spi1 ||
s->ctrl->segments == aspeed_segments_ast2500_spi2) &&
- cs == s->ctrl->max_slaves &&
+ cs == s->ctrl->max_devices &&
seg.addr + seg.size != s->ctrl->segments[cs].addr +
s->ctrl->segments[cs].size) {
qemu_log_mask(LOG_GUEST_ERROR,
@@ -948,7 +948,7 @@ static void aspeed_smc_reset(DeviceState *d)
}
/* setup the default segment register values and regions for all */
- for (i = 0; i < s->ctrl->max_slaves; ++i) {
+ for (i = 0; i < s->ctrl->max_devices; ++i) {
aspeed_smc_flash_set_segment_region(s, i,
s->ctrl->segment_to_reg(s, &s->ctrl->segments[i]));
}
@@ -995,8 +995,8 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size)
(s->ctrl->has_dma && addr == R_DMA_DRAM_ADDR) ||
(s->ctrl->has_dma && addr == R_DMA_LEN) ||
(s->ctrl->has_dma && addr == R_DMA_CHECKSUM) ||
- (addr >= R_SEG_ADDR0 && addr < R_SEG_ADDR0 + s->ctrl->max_slaves) ||
- (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_slaves)) {
+ (addr >= R_SEG_ADDR0 && addr < R_SEG_ADDR0 + s->ctrl->max_devices) ||
+ (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_devices)) {
trace_aspeed_smc_read(addr, size, s->regs[addr]);
@@ -1270,7 +1270,7 @@ static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data,
int cs = addr - s->r_ctrl0;
aspeed_smc_flash_update_ctrl(&s->flashes[cs], value);
} else if (addr >= R_SEG_ADDR0 &&
- addr < R_SEG_ADDR0 + s->ctrl->max_slaves) {
+ addr < R_SEG_ADDR0 + s->ctrl->max_devices) {
int cs = addr - R_SEG_ADDR0;
if (value != s->regs[R_SEG_ADDR0 + cs]) {
@@ -1341,10 +1341,10 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
s->conf_enable_w0 = s->ctrl->conf_enable_w0;
/* Enforce some real HW limits */
- if (s->num_cs > s->ctrl->max_slaves) {
+ if (s->num_cs > s->ctrl->max_devices) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: num_cs cannot exceed: %d\n",
- __func__, s->ctrl->max_slaves);
- s->num_cs = s->ctrl->max_slaves;
+ __func__, s->ctrl->max_devices);
+ s->num_cs = s->ctrl->max_devices;
}
/* DMA irq. Keep it first for the initialization in the SoC */
@@ -1376,7 +1376,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
s->ctrl->flash_window_size);
sysbus_init_mmio(sbd, &s->mmio_flash);
- s->flashes = g_new0(AspeedSMCFlash, s->ctrl->max_slaves);
+ s->flashes = g_new0(AspeedSMCFlash, s->ctrl->max_devices);
/*
* Let's create a sub memory region for each possible slave. All
@@ -1385,7 +1385,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
* module behind to handle the memory accesses. This depends on
* the board configuration.
*/
- for (i = 0; i < s->ctrl->max_slaves; ++i) {
+ for (i = 0; i < s->ctrl->max_devices; ++i) {
AspeedSMCFlash *fl = &s->flashes[i];
snprintf(name, sizeof(name), "%s.%d", s->ctrl->name, i);
--
2.26.2
next prev parent reply other threads:[~2020-09-10 7:02 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-10 7:01 [PATCH 0/6] misc: Some inclusive terminology changes Philippe Mathieu-Daudé
2020-09-10 7:01 ` Philippe Mathieu-Daudé [this message]
2020-09-10 7:03 ` [PATCH 1/6] hw/ssi/aspeed_smc: Rename max_slaves as max_devices Thomas Huth
2020-09-10 9:08 ` Paolo Bonzini
2020-09-10 19:25 ` Cédric Le Goater
2020-09-10 7:01 ` [PATCH 2/6] hw/core/stream: Rename StreamSlave as StreamSink Philippe Mathieu-Daudé
2020-09-10 7:06 ` Philippe Mathieu-Daudé
2020-09-11 7:28 ` Paolo Bonzini
2020-09-11 7:30 ` Edgar E. Iglesias
2020-09-10 7:01 ` [PATCH 3/6] hw/dma/xilinx_axidma: " Philippe Mathieu-Daudé
2020-09-11 7:28 ` Paolo Bonzini
2020-09-11 7:31 ` Edgar E. Iglesias
2020-09-10 7:01 ` [PATCH 4/6] hw/net/xilinx_axienet: " Philippe Mathieu-Daudé
2020-09-11 7:28 ` Paolo Bonzini
2020-09-11 7:32 ` Edgar E. Iglesias
2020-09-10 7:01 ` [PATCH 5/6] hw/pci-host/q35: Rename PCI 'black hole as '(memory) hole' Philippe Mathieu-Daudé
2020-09-10 7:15 ` Thomas Huth
2020-09-10 7:30 ` Philippe Mathieu-Daudé
2020-09-10 9:11 ` Paolo Bonzini
2020-09-10 9:14 ` Daniel P. Berrangé
2020-09-10 11:36 ` Paolo Bonzini
2020-09-10 7:01 ` [PATCH 6/6] target/i386/kvm: Rename host_tsx_blacklisted() as host_tsx_broken() Philippe Mathieu-Daudé
2020-09-10 7:08 ` Thomas Huth
2020-09-10 9:08 ` Paolo Bonzini
2020-09-10 10:13 ` Laurent Vivier
2020-09-10 7:38 ` [PATCH 0/6] misc: Some inclusive terminology changes Laurent Vivier
2020-09-17 19:02 ` Laurent Vivier
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