* [PULL 1/3] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-18 7:27 [PULL 0/3] aspeed queue Cédric Le Goater
@ 2020-09-18 7:27 ` Cédric Le Goater
2020-09-18 7:27 ` [PULL 2/3] hw/arm/aspeed: Add machine properties to define the flash models Cédric Le Goater
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Cédric Le Goater @ 2020-09-18 7:27 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Philippe Mathieu-Daudé, Cédric Le Goater
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
The UART5 is present on the machine regardless there is a
character device connected to it. Map it unconditionally.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200905212415.760452-1-f4bug@amsat.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/arm/aspeed_ast2600.c | 8 +++-----
hw/arm/aspeed_soc.c | 8 +++-----
2 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 9d95e4214357..1450bde7cf26 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
}
/* UART - attach an 8250 to the IO space as our UART5 */
- if (serial_hd(0)) {
- qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
- serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
- uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
- }
+ serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
+ aspeed_soc_get_irq(s, ASPEED_DEV_UART5),
+ 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
/* I2C */
object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 35be126db6fd..7eefd54ac07a 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
}
/* UART - attach an 8250 to the IO space as our UART5 */
- if (serial_hd(0)) {
- qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
- serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
- uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
- }
+ serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
+ aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400,
+ serial_hd(0), DEVICE_LITTLE_ENDIAN);
/* I2C */
object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
--
2.25.4
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PULL 2/3] hw/arm/aspeed: Add machine properties to define the flash models
2020-09-18 7:27 [PULL 0/3] aspeed queue Cédric Le Goater
2020-09-18 7:27 ` [PULL 1/3] hw/arm/aspeed: Map the UART5 device unconditionally Cédric Le Goater
@ 2020-09-18 7:27 ` Cédric Le Goater
2020-09-18 7:27 ` [PULL 3/3] misc: aspeed_scu: Update AST2600 silicon id register Cédric Le Goater
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Cédric Le Goater @ 2020-09-18 7:27 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, 郁雷, Cédric Le Goater,
Joel Stanley
Some machines don't have much differences a part from the flash model
being used. Introduce new machine properties to change them from the
command line.
For instance, to start the ast2500-evb machine with a different FMC
chip and a 64M SPI chip, use :
-M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
Cc: 郁雷 <yulei.sh@bytedance.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Lei YU <yulei.sh@bytedance.com>
Message-Id: <20200915054859.2338477-1-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
docs/system/arm/aspeed.rst | 18 +++++++++++++++
hw/arm/aspeed.c | 45 ++++++++++++++++++++++++++++++++++++--
2 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index 45f891eb3cad..2d33d023453e 100644
--- a/docs/system/arm/aspeed.rst
+++ b/docs/system/arm/aspeed.rst
@@ -83,3 +83,21 @@ The image should be attached as an MTD drive. Run :
$ qemu-system-arm -M romulus-bmc -nic user \
-drive file=flash-romulus,format=raw,if=mtd -nographic
+
+Options specific to Aspeed machines are :
+
+ * ``execute-in-place`` which emulates the boot from the CE0 flash
+ device by using the FMC controller to load the instructions, and
+ not simply from RAM. This takes a little longer.
+
+ * ``fmc-model`` to change the FMC Flash model. FW needs support for
+ the chip model to boot.
+
+ * ``spi-model`` to change the SPI Flash model.
+
+For instance, to start the ``ast2500-evb`` machine with a different
+FMC chip and a bigger (64M) SPI chip, use :
+
+.. code-block:: bash
+
+ -M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 8bfb1c79ddc5..bdb981d2f878 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -41,6 +41,8 @@ struct AspeedMachineState {
MemoryRegion ram_container;
MemoryRegion max_ram;
bool mmio_exec;
+ char *fmc_model;
+ char *spi_model;
};
/* Palmetto hardware value: 0x120CE416 */
@@ -332,8 +334,10 @@ static void aspeed_machine_init(MachineState *machine)
"max_ram", max_ram_size - ram_size);
memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram);
- aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model);
- aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model);
+ aspeed_board_init_flashes(&bmc->soc.fmc, bmc->fmc_model ?
+ bmc->fmc_model : amc->fmc_model);
+ aspeed_board_init_flashes(&bmc->soc.spi[0], bmc->spi_model ?
+ bmc->spi_model : amc->spi_model);
/* Install first FMC flash content as a boot rom. */
if (drive0) {
@@ -570,6 +574,34 @@ static void aspeed_machine_instance_init(Object *obj)
ASPEED_MACHINE(obj)->mmio_exec = false;
}
+static char *aspeed_get_fmc_model(Object *obj, Error **errp)
+{
+ AspeedMachineState *bmc = ASPEED_MACHINE(obj);
+ return g_strdup(bmc->fmc_model);
+}
+
+static void aspeed_set_fmc_model(Object *obj, const char *value, Error **errp)
+{
+ AspeedMachineState *bmc = ASPEED_MACHINE(obj);
+
+ g_free(bmc->fmc_model);
+ bmc->fmc_model = g_strdup(value);
+}
+
+static char *aspeed_get_spi_model(Object *obj, Error **errp)
+{
+ AspeedMachineState *bmc = ASPEED_MACHINE(obj);
+ return g_strdup(bmc->spi_model);
+}
+
+static void aspeed_set_spi_model(Object *obj, const char *value, Error **errp)
+{
+ AspeedMachineState *bmc = ASPEED_MACHINE(obj);
+
+ g_free(bmc->spi_model);
+ bmc->spi_model = g_strdup(value);
+}
+
static void aspeed_machine_class_props_init(ObjectClass *oc)
{
object_class_property_add_bool(oc, "execute-in-place",
@@ -577,6 +609,15 @@ static void aspeed_machine_class_props_init(ObjectClass *oc)
aspeed_set_mmio_exec);
object_class_property_set_description(oc, "execute-in-place",
"boot directly from CE0 flash device");
+
+ object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model,
+ aspeed_set_fmc_model);
+ object_class_property_set_description(oc, "fmc-model",
+ "Change the FMC Flash model");
+ object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model,
+ aspeed_set_spi_model);
+ object_class_property_set_description(oc, "spi-model",
+ "Change the SPI Flash model");
}
static int aspeed_soc_num_cpus(const char *soc_name)
--
2.25.4
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PULL 3/3] misc: aspeed_scu: Update AST2600 silicon id register
2020-09-18 7:27 [PULL 0/3] aspeed queue Cédric Le Goater
2020-09-18 7:27 ` [PULL 1/3] hw/arm/aspeed: Map the UART5 device unconditionally Cédric Le Goater
2020-09-18 7:27 ` [PULL 2/3] hw/arm/aspeed: Add machine properties to define the flash models Cédric Le Goater
@ 2020-09-18 7:27 ` Cédric Le Goater
2020-09-18 7:39 ` [PULL 0/3] aspeed queue no-reply
2020-09-18 14:07 ` Peter Maydell
4 siblings, 0 replies; 6+ messages in thread
From: Cédric Le Goater @ 2020-09-18 7:27 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Joel Stanley, Cédric Le Goater
From: Joel Stanley <joel@jms.id.au>
Aspeed have released an updated datasheet (v7) containing the silicon id
for the AST2600 A2. It looks like this:
SCU004 SCU014
AST2600-A0 0x05000303 0x05000303
AST2600-A1 0x05010303 0x05010303
AST2600-A2 0x05010303 0x05020303
AST2620-A1 0x05010203 0x05010203
AST2620-A2 0x05010203 0x05020203
The SCU004 (silicon id 1) value matches SCU014 for A0, but for
subsequent revisions it is hard coded to the A1 value.
Qemu effectively dropped support for the A0 in 7582591ae745 ("aspeed:
Support AST2600A1 silicon revision") as the A0 reset table was removed,
so it makes sense to only support the behaviour of A1 and onwards.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200916082012.776628-1-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/misc/aspeed_scu.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index dc6dd87c22f4..40a38ebd8549 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -670,7 +670,12 @@ static void aspeed_ast2600_scu_reset(DeviceState *dev)
memcpy(s->regs, asc->resets, asc->nr_regs * 4);
- s->regs[AST2600_SILICON_REV] = s->silicon_rev;
+ /*
+ * A0 reports A0 in _REV, but subsequent revisions report A1 regardless
+ * of actual revision. QEMU and Linux only support A1 onwards so this is
+ * sufficient.
+ */
+ s->regs[AST2600_SILICON_REV] = AST2600_A1_SILICON_REV;
s->regs[AST2600_SILICON_REV2] = s->silicon_rev;
s->regs[AST2600_HW_STRAP1] = s->hw_strap1;
s->regs[AST2600_HW_STRAP2] = s->hw_strap2;
--
2.25.4
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PULL 0/3] aspeed queue
2020-09-18 7:27 [PULL 0/3] aspeed queue Cédric Le Goater
` (2 preceding siblings ...)
2020-09-18 7:27 ` [PULL 3/3] misc: aspeed_scu: Update AST2600 silicon id register Cédric Le Goater
@ 2020-09-18 7:39 ` no-reply
2020-09-18 14:07 ` Peter Maydell
4 siblings, 0 replies; 6+ messages in thread
From: no-reply @ 2020-09-18 7:39 UTC (permalink / raw)
To: clg; +Cc: peter.maydell, qemu-devel, clg
Patchew URL: https://patchew.org/QEMU/20200918072703.331138-1-clg@kaod.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
N/A. Internal error while reading log file
The full log is available at
http://patchew.org/logs/20200918072703.331138-1-clg@kaod.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PULL 0/3] aspeed queue
2020-09-18 7:27 [PULL 0/3] aspeed queue Cédric Le Goater
` (3 preceding siblings ...)
2020-09-18 7:39 ` [PULL 0/3] aspeed queue no-reply
@ 2020-09-18 14:07 ` Peter Maydell
4 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2020-09-18 14:07 UTC (permalink / raw)
To: Cédric Le Goater; +Cc: QEMU Developers
On Fri, 18 Sep 2020 at 08:27, Cédric Le Goater <clg@kaod.org> wrote:
>
> The following changes since commit de39a045bd8d2b49e4f3d07976622c29d58e0bac:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/vga-20200915-pull-request' into staging (2020-09-15 14:25:05 +0100)
>
> are available in the Git repository at:
>
> https://github.com/legoater/qemu/ tags/pull-aspeed-20200918
>
> for you to fetch changes up to 204dab83fe00a3e0781d93ad7899192a9409e987:
>
> misc: aspeed_scu: Update AST2600 silicon id register (2020-09-18 09:04:36 +0200)
>
> ----------------------------------------------------------------
> Aspeed patches :
>
> * Couple of cleanups
> * New machine properties to define the flash models
>
> ----------------------------------------------------------------
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.2
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread