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From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Cornelia Huck <cohuck@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Thomas Huth <thuth@redhat.com>,
	David Hildenbrand <david@redhat.com>
Subject: [PATCH v1 5/8] s390x/tcg: Implement BRANCH INDIRECT ON CONDITION (BIC)
Date: Tue, 22 Sep 2020 12:31:26 +0200	[thread overview]
Message-ID: <20200922103129.12824-6-david@redhat.com> (raw)
In-Reply-To: <20200922103129.12824-1-david@redhat.com>

Just like BRANCH ON CONDITION - however the address is read from memory
(always 8 bytes are read), we have to wrap the address manually. The
address is read using current CPU DAT/address-space controls, just like
ordinary data.

Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/insn-data.def | 2 ++
 target/s390x/translate.c   | 5 +++++
 2 files changed, 7 insertions(+)

diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 455efe73da..dfb0ec067b 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -115,6 +115,8 @@
 /* BRANCH RELATIVE AND SAVE */
     C(0xa705, BRAS,    RI_b,  Z,   0, 0, r1, 0, basi, 0)
     C(0xc005, BRASL,   RIL_b, Z,   0, 0, r1, 0, basi, 0)
+/* BRANCH INDIRECT ON CONDITION */
+    C(0xe347, BIC,     RXY_b, MIE2,0, m2_64, 0, 0, bc, 0)
 /* BRANCH ON CONDITION */
     C(0x0700, BCR,     RR_b,  Z,   0, r2_nz, 0, 0, bc, 0)
     C(0x4700, BC,      RX_b,  Z,   0, a2, 0, 0, bc, 0)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index b536491892..383edf7419 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -1626,6 +1626,11 @@ static DisasJumpType op_bc(DisasContext *s, DisasOps *o)
         return DISAS_NEXT;
     }
 
+    /* For BIC the address came from memory, we need to wrap it again. */
+    if (s->fields.op2 == 0x47) {
+        gen_addi_and_wrap_i64(s, o->in2, o->in2, 0);
+    }
+
     disas_jcc(s, &c, m1);
     return help_branch(s, &c, is_imm, imm, o->in2);
 }
-- 
2.26.2



  parent reply	other threads:[~2020-09-22 10:37 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-22 10:31 [PATCH v1 0/8] s390x/tcg: Implement some z14 facilities David Hildenbrand
2020-09-22 10:31 ` [PATCH v1 1/8] s390x/tcg: Implement ADD HALFWORD (AGH) David Hildenbrand
2020-09-23  4:49   ` Thomas Huth
2020-09-23  4:53   ` Thomas Huth
2020-09-23  7:50     ` David Hildenbrand
2020-09-25 21:25   ` Richard Henderson
2020-09-22 10:31 ` [PATCH v1 2/8] s390x/tcg: Implement SUBTRACT HALFWORD (SGH) David Hildenbrand
2020-09-23  4:52   ` Thomas Huth
2020-09-25 21:25   ` Richard Henderson
2020-09-22 10:31 ` [PATCH v1 3/8] s390x/tcg: Implement MULTIPLY (MG, MGRK) David Hildenbrand
2020-09-25 21:36   ` Richard Henderson
2020-09-22 10:31 ` [PATCH v1 4/8] s390x/tcg: Implement MULTIPLY HALFWORD (MGH) David Hildenbrand
2020-09-25 21:39   ` Richard Henderson
2020-09-22 10:31 ` David Hildenbrand [this message]
2020-09-25 21:45   ` [PATCH v1 5/8] s390x/tcg: Implement BRANCH INDIRECT ON CONDITION (BIC) Richard Henderson
2020-09-28 11:50     ` David Hildenbrand
2020-09-22 10:31 ` [PATCH v1 6/8] s390x/tcg: Implement MULTIPLY SINGLE (MSC, MSGC, MSGRKC, MSRKC) David Hildenbrand
2020-09-22 16:14   ` Richard Henderson
2020-09-22 16:19     ` David Hildenbrand
2020-09-25 22:06   ` Richard Henderson
2020-09-28 12:13     ` David Hildenbrand
2020-09-22 10:31 ` [PATCH v1 7/8] s390x/tcg: We support Miscellaneous-Instruction-Extensions Facility 2 David Hildenbrand
2020-09-25 22:08   ` Richard Henderson
2020-09-22 10:31 ` [PATCH v1 8/8] s390x/tcg: Implement CIPHER MESSAGE WITH AUTHENTICATION (KMA) David Hildenbrand
2020-09-25 22:12   ` Richard Henderson
2020-09-22 15:41 ` [PATCH v1 0/8] s390x/tcg: Implement some z14 facilities no-reply
2020-09-25 22:43 ` Richard Henderson
2020-09-28 11:54   ` David Hildenbrand

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