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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: bharata@linux.ibm.com, alex.bennee@linaro.org, david@redhat.com
Subject: [PATCH 1/8] softfloat: Use mulu64 for mul64To128
Date: Wed, 23 Sep 2020 18:24:46 -0700	[thread overview]
Message-ID: <20200924012453.659757-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200924012453.659757-1-richard.henderson@linaro.org>

Via host-utils.h, we use a host widening multiply for
64-bit hosts, and a common subroutine for 32-bit hosts.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/fpu/softfloat-macros.h | 24 ++++--------------------
 1 file changed, 4 insertions(+), 20 deletions(-)

diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h
index a35ec2893a..57845f8af0 100644
--- a/include/fpu/softfloat-macros.h
+++ b/include/fpu/softfloat-macros.h
@@ -83,6 +83,7 @@ this code that are retained.
 #define FPU_SOFTFLOAT_MACROS_H
 
 #include "fpu/softfloat-types.h"
+#include "qemu/host-utils.h"
 
 /*----------------------------------------------------------------------------
 | Shifts `a' right by the number of bits given in `count'.  If any nonzero
@@ -515,27 +516,10 @@ static inline void
 | `z0Ptr' and `z1Ptr'.
 *----------------------------------------------------------------------------*/
 
-static inline void mul64To128( uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t *z1Ptr )
+static inline void
+mul64To128(uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t *z1Ptr)
 {
-    uint32_t aHigh, aLow, bHigh, bLow;
-    uint64_t z0, zMiddleA, zMiddleB, z1;
-
-    aLow = a;
-    aHigh = a>>32;
-    bLow = b;
-    bHigh = b>>32;
-    z1 = ( (uint64_t) aLow ) * bLow;
-    zMiddleA = ( (uint64_t) aLow ) * bHigh;
-    zMiddleB = ( (uint64_t) aHigh ) * bLow;
-    z0 = ( (uint64_t) aHigh ) * bHigh;
-    zMiddleA += zMiddleB;
-    z0 += ( ( (uint64_t) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 );
-    zMiddleA <<= 32;
-    z1 += zMiddleA;
-    z0 += ( z1 < zMiddleA );
-    *z1Ptr = z1;
-    *z0Ptr = z0;
-
+    mulu64(z1Ptr, z0Ptr, a, b);
 }
 
 /*----------------------------------------------------------------------------
-- 
2.25.1



  reply	other threads:[~2020-09-24  1:26 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-24  1:24 [PATCH 0/8] softfloat: Implement float128_muladd Richard Henderson
2020-09-24  1:24 ` Richard Henderson [this message]
2020-09-24  7:32   ` [PATCH 1/8] softfloat: Use mulu64 for mul64To128 David Hildenbrand
2020-09-24  1:24 ` [PATCH 2/8] softfloat: Use int128.h for some operations Richard Henderson
2020-09-24  7:35   ` David Hildenbrand
2020-09-24  1:24 ` [PATCH 3/8] softfloat: Tidy a * b + inf return Richard Henderson
2020-09-24  7:37   ` David Hildenbrand
2020-09-24  1:24 ` [PATCH 4/8] softfloat: Add float_cmask and constants Richard Henderson
2020-09-24  7:40   ` David Hildenbrand
2020-09-24  1:24 ` [PATCH 5/8] softfloat: Inline pick_nan_muladd into its caller Richard Henderson
2020-09-24  7:42   ` David Hildenbrand
2020-09-24  1:24 ` [PATCH 6/8] softfloat: Implement float128_muladd Richard Henderson
2020-09-24  7:56   ` David Hildenbrand
2020-09-24 13:30     ` Richard Henderson
2020-09-25  9:17       ` David Hildenbrand
2020-09-24  1:24 ` [PATCH 7/8] softfloat: Use x86_64 assembly for {add,sub}{192,256} Richard Henderson
2020-09-24  1:24 ` [PATCH 8/8] softfloat: Use aarch64 " Richard Henderson
2020-09-24  8:00 ` [PATCH 0/8] softfloat: Implement float128_muladd David Hildenbrand

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