From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Damien Hedde" <damien.hedde@greensocs.com>,
"Huacai Chen" <zltjiangshi@gmail.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Paul Burton" <paulburton@kernel.org>,
"Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Cleber Rosa" <crosa@redhat.com>,
"Huacai Chen" <chenhc@lemote.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Richard Henderson" <rth@twiddle.net>
Subject: [PATCH 08/16] hw/mips/fuloong2e: Set CPU frequency to 533 MHz
Date: Mon, 28 Sep 2020 19:15:31 +0200 [thread overview]
Message-ID: <20200928171539.788309-9-f4bug@amsat.org> (raw)
In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org>
The CPU frequency is normally provided by the firmware in the
"cpuclock" environment variable. The 2E board can handles up
to 660MHz, but be conservative and take the same value used
by the Linux kernel: 533 MHz.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/fuloong2e.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index f28609976bf..1a925dcc201 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -28,6 +28,7 @@
#include "hw/isa/superio.h"
#include "net/net.h"
#include "hw/boards.h"
+#include "hw/qdev-clock.h"
#include "hw/i2c/smbus_eeprom.h"
#include "hw/block/flash.h"
#include "hw/mips/mips.h"
@@ -300,10 +301,15 @@ static void mips_fuloong2e_init(MachineState *machine)
I2CBus *smbus;
MIPSCPU *cpu;
CPUMIPSState *env;
+ Clock *cpuclk;
DeviceState *dev;
/* init CPUs */
- cpu = MIPS_CPU(cpu_create(machine->cpu_type));
+ cpu = MIPS_CPU(object_new(machine->cpu_type));
+ cpuclk = qdev_init_clock_out(DEVICE(cpu), "cpuclk");
+ clock_set_hz(cpuclk, 533080000); /* ~533 MHz */
+ qdev_connect_clock_in(DEVICE(cpu), "clk", cpuclk);
+ qdev_realize(DEVICE(cpu), NULL, &error_abort);
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
--
2.26.2
next prev parent reply other threads:[~2020-09-28 17:19 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-28 17:15 [PATCH 00/16] hw/mips: Set CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 01/16] hw/core/cpu: Let CPU object have a clock source Philippe Mathieu-Daudé
2020-09-30 7:43 ` Igor Mammedov
2020-09-30 10:16 ` Philippe Mathieu-Daudé
2020-10-05 16:40 ` Igor Mammedov
2020-10-05 17:19 ` Philippe Mathieu-Daudé
2020-10-05 17:44 ` Eduardo Habkost
2020-10-05 18:09 ` Philippe Mathieu-Daudé
2020-10-05 18:29 ` Philippe Mathieu-Daudé
2020-10-05 19:22 ` Eduardo Habkost
2020-10-06 18:11 ` Philippe Mathieu-Daudé
2020-10-06 19:53 ` Philippe Mathieu-Daudé
2020-10-05 18:43 ` Eduardo Habkost
2020-09-28 17:15 ` [PATCH 02/16] target/mips: Move cpu_mips_get_random() with CP0 helpers Philippe Mathieu-Daudé
2020-09-30 18:04 ` Aleksandar Markovic
2020-09-28 17:15 ` [PATCH 03/16] target/mips/cp0_timer: Explicit unit in variable name Philippe Mathieu-Daudé
2020-09-30 18:10 ` Aleksandar Markovic
2020-09-28 17:15 ` [PATCH 04/16] target/mips/cpu: Introduce mips_cpu_properties[] Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 05/16] target/mips/cpu: Set default CPU frequency to 200 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 06/16] target/mips: Keep CP0 counter in sync with the CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 07/16] hw/mips/r4k: Explicit CPU frequency is 200 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` Philippe Mathieu-Daudé [this message]
2020-09-28 17:15 ` [PATCH 09/16] hw/mips/mipssim: Correct CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 10/16] hw/mips/jazz: Correct CPU frequencies Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 11/16] hw/mips/cps: Expose input clock and connect it to CPU cores Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 12/16] hw/mips/boston: Set CPU frequency to 1 GHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 13/16] hw/mips/malta: Set CPU frequency to 320 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 14/16] hw/mips/cps: Do not allow use without input clock Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 15/16] target/mips/cpu: Do not allow system-mode " Philippe Mathieu-Daudé
2020-09-29 13:01 ` Igor Mammedov
2020-09-29 14:40 ` Philippe Mathieu-Daudé
2020-10-05 7:39 ` Philippe Mathieu-Daudé
2020-10-05 16:25 ` Igor Mammedov
2020-09-28 17:15 ` [PATCH 16/16] tests/acceptance: Test the MIPSsim machine Philippe Mathieu-Daudé
2020-09-28 20:33 ` Willian Rampazzo
2020-09-29 9:09 ` Philippe Mathieu-Daudé
2020-09-29 9:38 ` Alex Bennée
2020-09-29 9:50 ` Philippe Mathieu-Daudé
2020-09-30 8:43 ` Daniel P. Berrangé
2020-09-30 9:49 ` Alex Bennée
2020-09-30 10:08 ` Philippe Mathieu-Daudé
2020-09-29 2:46 ` [PATCH 00/16] hw/mips: Set CPU frequency no-reply
2020-09-29 8:58 ` Philippe Mathieu-Daudé
2020-09-30 7:40 ` Igor Mammedov
2020-09-30 10:13 ` Philippe Mathieu-Daudé
2020-10-09 15:40 ` Philippe Mathieu-Daudé
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