From: Yang Weijiang <weijiang.yang@intel.com>
To: pbonzini@redhat.com, mtosatti@redhat.com, rth@twiddle.net,
ehabkost@redhat.com, sean.j.christopherson@intel.com,
qemu-devel@nongnu.org
Cc: Yang Weijiang <weijiang.yang@intel.com>, hao.wu@intel.com
Subject: [Qemu-devel][PATCH v6 6/6] x86/cpu: Advise CET bits in CPU/MSR feature words
Date: Tue, 13 Oct 2020 13:19:35 +0800 [thread overview]
Message-ID: <20201013051935.6052-7-weijiang.yang@intel.com> (raw)
In-Reply-To: <20201013051935.6052-1-weijiang.yang@intel.com>
CET SHSTK and IBT feature are enumerated via CPUID.(EAX=07H,ECX=0H):ECX[bit 7]
and EDX[bit 20]. CET state load/restore at vmentry/vmexit are enabled via
VMX_ENTRY_CTLS[bit 20] and VMX_EXIT_CTLS[bit 28].
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
---
target/i386/cpu.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 5496fd68d4..904bf1d4b6 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -965,7 +965,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
.type = CPUID_FEATURE_WORD,
.feat_names = {
NULL, "avx512vbmi", "umip", "pku",
- NULL /* ospke */, "waitpkg", "avx512vbmi2", NULL,
+ NULL /* ospke */, "waitpkg", "avx512vbmi2", "shstk",
"gfni", "vaes", "vpclmulqdq", "avx512vnni",
"avx512bitalg", NULL, "avx512-vpopcntdq", NULL,
"la57", NULL, NULL, NULL,
@@ -988,7 +988,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
"avx512-vp2intersect", NULL, "md-clear", NULL,
NULL, NULL, "serialize", NULL,
"tsx-ldtrk", NULL, NULL /* pconfig */, NULL,
- NULL, NULL, NULL, NULL,
+ "ibt", NULL, NULL, NULL,
NULL, NULL, "spec-ctrl", "stibp",
NULL, "arch-capabilities", "core-capability", "ssbd",
},
@@ -1250,7 +1250,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
"vmx-exit-save-efer", "vmx-exit-load-efer",
"vmx-exit-save-preemption-timer", "vmx-exit-clear-bndcfgs",
NULL, "vmx-exit-clear-rtit-ctl", NULL, NULL,
- NULL, NULL, NULL, NULL,
+ "vmx-exit-save-cet-ctl", NULL, NULL, NULL,
},
.msr = {
.index = MSR_IA32_VMX_TRUE_EXIT_CTLS,
@@ -1265,7 +1265,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
NULL, "vmx-entry-ia32e-mode", NULL, NULL,
NULL, "vmx-entry-load-perf-global-ctrl", "vmx-entry-load-pat", "vmx-entry-load-efer",
"vmx-entry-load-bndcfgs", NULL, "vmx-entry-load-rtit-ctl", NULL,
- NULL, NULL, NULL, NULL,
+ "vmx-entry-load-cet-ctl", NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
},
--
2.26.2
prev parent reply other threads:[~2020-10-13 5:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-13 5:19 [Qemu-devel][PATCH v6 0/6] Enable CET support for guest Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 1/6] x86/cpu: Rename XSAVE related feature words Yang Weijiang
2020-10-14 0:08 ` Sean Christopherson
2020-10-15 2:20 ` Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 2/6] x86/cpuid: Enable XSS feature enumeration for CPUID Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 3/6] x86/cpu: Enable CET components support for XSAVE Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 4/6] x86/cpu: Add user-space MSR access interface for CET Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 5/6] x86/cpu: Add CET state support for guest migration Yang Weijiang
2020-10-13 5:19 ` Yang Weijiang [this message]
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