From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Yang Weijiang <weijiang.yang@intel.com>
Cc: ehabkost@redhat.com, mtosatti@redhat.com, qemu-devel@nongnu.org,
pbonzini@redhat.com, rth@twiddle.net, hao.wu@intel.com
Subject: Re: [Qemu-devel][PATCH v6 1/6] x86/cpu: Rename XSAVE related feature words.
Date: Tue, 13 Oct 2020 17:08:54 -0700 [thread overview]
Message-ID: <20201014000854.GB16347@linux.intel.com> (raw)
In-Reply-To: <20201013051935.6052-2-weijiang.yang@intel.com>
On Tue, Oct 13, 2020 at 01:19:30PM +0800, Yang Weijiang wrote:
> With more components in XSS being developed on Intel platform,
> it's necessary to clean up existing XSAVE related feature words to
> make the name clearer. It's to prepare for adding CET related support
> in following patches.
>
> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> ---
> target/i386/cpu.c | 60 ++++++++++++++++++++--------------------
> target/i386/cpu.h | 6 ++--
> target/i386/fpu_helper.c | 2 +-
> target/i386/translate.c | 2 +-
> 4 files changed, 35 insertions(+), 35 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 588f32e136..e2891740f1 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1050,7 +1050,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
> .tcg_features = 0,
> .unmigratable_flags = 0,
> },
> - [FEAT_XSAVE] = {
> + [FEAT_XSAVE_INSTRUCTION] = {
The COMP->XCRO change is great, but I don't think XSAVE->XSAVE_INSTRUCTION
makes sense. There is no guarantee the word will only be used for
instructions; it already blurs the line, e.g. XSAVEC also changes the behavior
of XRSTOR, and XSAVES also means the XSS MSR is available.
FWIW, I also don't find FEAT_XSAVE to be confusing.
> .type = CPUID_FEATURE_WORD,
> .feat_names = {
> "xsaveopt", "xsavec", "xgetbv1", "xsaves",
> @@ -1084,7 +1084,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
> .cpuid = { .eax = 6, .reg = R_EAX, },
> .tcg_features = TCG_6_EAX_FEATURES,
> },
> - [FEAT_XSAVE_COMP_LO] = {
> + [FEAT_XSAVE_XCR0_LO] = {
> .type = CPUID_FEATURE_WORD,
> .cpuid = {
> .eax = 0xD,
next prev parent reply other threads:[~2020-10-14 0:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-13 5:19 [Qemu-devel][PATCH v6 0/6] Enable CET support for guest Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 1/6] x86/cpu: Rename XSAVE related feature words Yang Weijiang
2020-10-14 0:08 ` Sean Christopherson [this message]
2020-10-15 2:20 ` Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 2/6] x86/cpuid: Enable XSS feature enumeration for CPUID Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 3/6] x86/cpu: Enable CET components support for XSAVE Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 4/6] x86/cpu: Add user-space MSR access interface for CET Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 5/6] x86/cpu: Add CET state support for guest migration Yang Weijiang
2020-10-13 5:19 ` [Qemu-devel][PATCH v6 6/6] x86/cpu: Advise CET bits in CPU/MSR feature words Yang Weijiang
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