From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PATCH 10/11] target/arm: Simplify do_long_3d and do_2scalar_long
Date: Tue, 27 Oct 2020 20:27:02 -0700 [thread overview]
Message-ID: <20201028032703.201526-11-richard.henderson@linaro.org> (raw)
In-Reply-To: <20201028032703.201526-1-richard.henderson@linaro.org>
In both cases, we can sink the write-back and perform
the accumulate into the normal destination temps.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-neon.c.inc | 23 +++++++++--------------
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc
index 7a0269970c..7cd41c79ec 100644
--- a/target/arm/translate-neon.c.inc
+++ b/target/arm/translate-neon.c.inc
@@ -2037,17 +2037,14 @@ static bool do_long_3d(DisasContext *s, arg_3diff *a,
if (accfn) {
tmp = tcg_temp_new_i64();
read_neon_element64(tmp, a->vd, 0, MO_64);
- accfn(tmp, tmp, rd0);
- write_neon_element64(tmp, a->vd, 0, MO_64);
+ accfn(rd0, tmp, rd0);
read_neon_element64(tmp, a->vd, 1, MO_64);
- accfn(tmp, tmp, rd1);
- write_neon_element64(tmp, a->vd, 1, MO_64);
+ accfn(rd1, tmp, rd1);
tcg_temp_free_i64(tmp);
- } else {
- write_neon_element64(rd0, a->vd, 0, MO_64);
- write_neon_element64(rd1, a->vd, 1, MO_64);
}
+ write_neon_element64(rd0, a->vd, 0, MO_64);
+ write_neon_element64(rd1, a->vd, 1, MO_64);
tcg_temp_free_i64(rd0);
tcg_temp_free_i64(rd1);
@@ -2670,16 +2667,14 @@ static bool do_2scalar_long(DisasContext *s, arg_2scalar *a,
if (accfn) {
TCGv_i64 t64 = tcg_temp_new_i64();
read_neon_element64(t64, a->vd, 0, MO_64);
- accfn(t64, t64, rn0_64);
- write_neon_element64(t64, a->vd, 0, MO_64);
+ accfn(rn0_64, t64, rn0_64);
read_neon_element64(t64, a->vd, 1, MO_64);
- accfn(t64, t64, rn1_64);
- write_neon_element64(t64, a->vd, 1, MO_64);
+ accfn(rn1_64, t64, rn1_64);
tcg_temp_free_i64(t64);
- } else {
- write_neon_element64(rn0_64, a->vd, 0, MO_64);
- write_neon_element64(rn1_64, a->vd, 1, MO_64);
}
+
+ write_neon_element64(rn0_64, a->vd, 0, MO_64);
+ write_neon_element64(rn1_64, a->vd, 1, MO_64);
tcg_temp_free_i64(rn0_64);
tcg_temp_free_i64(rn1_64);
return true;
--
2.25.1
next prev parent reply other threads:[~2020-10-28 3:40 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 3:26 [PATCH 00/11] target/arm: Fix neon reg offsets Richard Henderson
2020-10-28 3:26 ` [PATCH 01/11] target/arm: Introduce neon_full_reg_offset Richard Henderson
2020-10-28 3:26 ` [PATCH 02/11] target/arm: Move neon_element_offset to translate.c Richard Henderson
2020-10-28 3:26 ` [PATCH 03/11] target/arm: Use neon_element_offset in neon_load/store_reg Richard Henderson
2020-10-28 3:26 ` [PATCH 04/11] target/arm: Use neon_element_offset in vfp_reg_offset Richard Henderson
2020-10-28 3:26 ` [PATCH 05/11] target/arm: Add read/write_neon_element32 Richard Henderson
2020-10-28 20:22 ` Richard Henderson
2020-10-29 10:15 ` Peter Maydell
2020-10-28 3:26 ` [PATCH 06/11] target/arm: Expand read/write_neon_element32 to all MemOp Richard Henderson
2020-10-28 3:26 ` [PATCH 07/11] target/arm: Rename neon_load_reg32 to vfp_load_reg32 Richard Henderson
2020-10-28 3:27 ` [PATCH 08/11] target/arm: Add read/write_neon_element64 Richard Henderson
2020-10-28 3:27 ` [PATCH 09/11] target/arm: Rename neon_load_reg64 to vfp_load_reg64 Richard Henderson
2020-10-28 3:27 ` Richard Henderson [this message]
2020-10-28 3:27 ` [PATCH 11/11] target/arm: Improve do_prewiden_3d Richard Henderson
2020-10-28 16:48 ` [PATCH 00/11] target/arm: Fix neon reg offsets Peter Maydell
2020-10-28 18:31 ` Peter Maydell
2020-10-28 19:32 ` Richard Henderson
2020-10-28 20:03 ` Peter Maydell
2020-10-29 11:04 ` Peter Maydell
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