From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH v2 12/28] target/arm: Factor out preserve-fp-state from full_vfp_access_check()
Date: Thu, 19 Nov 2020 21:56:01 +0000 [thread overview]
Message-ID: <20201119215617.29887-13-peter.maydell@linaro.org> (raw)
In-Reply-To: <20201119215617.29887-1-peter.maydell@linaro.org>
Factor out the code which handles M-profile lazy FP state preservation
from full_vfp_access_check(); accesses to the FPCXT_NS register are
a special case which need to do just this part (corresponding in the
pseudocode to the PreserveFPState() function), and not the full
set of actions matching the pseudocode ExecuteFPCheck() which
normal FP instructions need to do.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-vfp.c.inc | 45 ++++++++++++++++++++--------------
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc
index 6bc327e9819..9c90c0647bd 100644
--- a/target/arm/translate-vfp.c.inc
+++ b/target/arm/translate-vfp.c.inc
@@ -83,6 +83,32 @@ static inline long vfp_f16_offset(unsigned reg, bool top)
return offs;
}
+/*
+ * Generate code for M-profile lazy FP state preservation if needed;
+ * this corresponds to the pseudocode PreserveFPState() function.
+ */
+static void gen_preserve_fp_state(DisasContext *s)
+{
+ if (s->v7m_lspact) {
+ /*
+ * Lazy state saving affects external memory and also the NVIC,
+ * so we must mark it as an IO operation for icount (and cause
+ * this to be the last insn in the TB).
+ */
+ if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
+ s->base.is_jmp = DISAS_UPDATE_EXIT;
+ gen_io_start();
+ }
+ gen_helper_v7m_preserve_fp_state(cpu_env);
+ /*
+ * If the preserve_fp_state helper doesn't throw an exception
+ * then it will clear LSPACT; we don't need to repeat this for
+ * any further FP insns in this TB.
+ */
+ s->v7m_lspact = false;
+ }
+}
+
/*
* Check that VFP access is enabled. If it is, do the necessary
* M-profile lazy-FP handling and then return true.
@@ -113,24 +139,7 @@ static bool full_vfp_access_check(DisasContext *s, bool ignore_vfp_enabled)
/* Handle M-profile lazy FP state mechanics */
/* Trigger lazy-state preservation if necessary */
- if (s->v7m_lspact) {
- /*
- * Lazy state saving affects external memory and also the NVIC,
- * so we must mark it as an IO operation for icount (and cause
- * this to be the last insn in the TB).
- */
- if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
- s->base.is_jmp = DISAS_UPDATE_EXIT;
- gen_io_start();
- }
- gen_helper_v7m_preserve_fp_state(cpu_env);
- /*
- * If the preserve_fp_state helper doesn't throw an exception
- * then it will clear LSPACT; we don't need to repeat this for
- * any further FP insns in this TB.
- */
- s->v7m_lspact = false;
- }
+ gen_preserve_fp_state(s);
/* Update ownership of FP context: set FPCCR.S to match current state */
if (s->v8m_fpccr_s_wrong) {
--
2.20.1
next prev parent reply other threads:[~2020-11-19 22:08 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-19 21:55 [PATCH v2 00/28] target/arm: Implement v8.1M and Cortex-M55 Peter Maydell
2020-11-19 21:55 ` [PATCH v2 01/28] hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFault Peter Maydell
2020-11-19 21:55 ` [PATCH v2 02/28] target/arm: Implement v8.1M PXN extension Peter Maydell
2020-11-19 21:55 ` [PATCH v2 03/28] target/arm: Don't clobber ID_PFR1.Security on M-profile cores Peter Maydell
2020-11-19 21:55 ` [PATCH v2 04/28] target/arm: Implement VSCCLRM insn Peter Maydell
2020-11-19 21:55 ` [PATCH v2 05/28] target/arm: Implement CLRM instruction Peter Maydell
2020-11-19 21:55 ` [PATCH v2 06/28] target/arm: Enforce M-profile VMRS/VMSR register restrictions Peter Maydell
2020-11-19 21:55 ` [PATCH v2 07/28] target/arm: Refactor M-profile VMSR/VMRS handling Peter Maydell
2020-12-01 12:54 ` Richard Henderson
2020-11-19 21:55 ` [PATCH v2 08/28] target/arm: Move general-use constant expanders up in translate.c Peter Maydell
2020-11-19 21:55 ` [PATCH v2 09/28] target/arm: Implement VLDR/VSTR system register Peter Maydell
2020-12-01 13:11 ` Richard Henderson
2020-12-03 11:39 ` Peter Maydell
2020-12-03 16:14 ` Richard Henderson
2020-11-19 21:55 ` [PATCH v2 10/28] target/arm: Implement M-profile FPSCR_nzcvqc Peter Maydell
2020-12-01 13:16 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 11/28] target/arm: Use new FPCR_NZCV_MASK constant Peter Maydell
2020-11-19 21:56 ` Peter Maydell [this message]
2020-11-19 22:18 ` [PATCH v2 12/28] target/arm: Factor out preserve-fp-state from full_vfp_access_check() Philippe Mathieu-Daudé
2020-11-19 21:56 ` [PATCH v2 13/28] target/arm: Implement FPCXT_S fp system register Peter Maydell
2020-12-01 13:40 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 14/28] target/arm: Implement FPCXT_NS " Peter Maydell
2020-12-01 14:05 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 15/28] hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M Peter Maydell
2020-12-01 14:28 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 16/28] target/arm: For v8.1M, always clear R0-R3, R12, APSR, EPSR on exception entry Peter Maydell
2020-12-01 14:33 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 17/28] target/arm: In v8.1M, don't set HFSR.FORCED on vector table fetch failures Peter Maydell
2020-12-01 14:41 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 18/28] target/arm: Implement v8.1M REVIDR register Peter Maydell
2020-12-01 14:43 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 19/28] target/arm: Implement new v8.1M NOCP check for exception return Peter Maydell
2020-12-01 14:49 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 20/28] target/arm: Implement new v8.1M VLLDM and VLSTM encodings Peter Maydell
2020-12-01 15:09 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 21/28] hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN Peter Maydell
2020-12-01 15:16 ` Richard Henderson
2020-12-01 15:22 ` Peter Maydell
2020-11-19 21:56 ` [PATCH v2 22/28] hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bit Peter Maydell
2020-12-01 15:19 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 23/28] target/arm: Implement CCR_S.TRD behaviour for SG insns Peter Maydell
2020-12-01 15:53 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 24/28] hw/intc/armv7m_nvic: Fix "return from inactive handler" check Peter Maydell
2020-12-01 15:58 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 25/28] target/arm: Implement M-profile "minimal RAS implementation" Peter Maydell
2020-12-01 16:04 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 26/28] hw/intc/armv7m_nvic: Implement read/write for RAS register block Peter Maydell
2020-12-01 16:11 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 27/28] hw/arm/armv7m: Correct typo in QOM object name Peter Maydell
2020-11-19 22:19 ` Philippe Mathieu-Daudé
2020-12-01 16:12 ` Richard Henderson
2020-11-19 21:56 ` [PATCH v2 28/28] target/arm: Implement Cortex-M55 model Peter Maydell
2020-12-01 16:24 ` Richard Henderson
2020-12-03 12:02 ` [PATCH v2 00/28] target/arm: Implement v8.1M and Cortex-M55 Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201119215617.29887-13-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).